/*
- * Copyright (C) 2012,2013 Lothar Waßmann <LW@KARO-electronics.de>
+ * Copyright (C) 2012-2015 Lothar Waßmann <LW@KARO-electronics.de>
*
* See file CREDITS for list of people who contributed to this
* project.
* GNU General Public License for more details.
*
*/
-
#include <common.h>
#include <errno.h>
#include <libfdt.h>
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
gd->bd->bi_arch_number = -1;
- if (ctrlc()) {
+ if (ctrlc() || (wrsr & WRSR_TOUT)) {
+ if (wrsr & WRSR_TOUT)
+ printf("WDOG RESET detected; Skipping PMIC setup\n");
+ else
+ printf("<CTRL-C> detected; safeboot enabled\n");
#ifndef CONFIG_MX6_TEMPERATURE_HOT
tx6_temp_check_enabled = false;
#endif
- printf("CTRL-C detected; Skipping PMIC setup\n");
return 1;
}
- ret = setup_pmic_voltages();
+ ret = tx6_pmic_init();
if (ret) {
printf("Failed to setup PMIC voltages\n");
hang();
#ifdef CONFIG_CMD_MMC
#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST)
static const iomux_v3_cfg_t mmc0_pads[] = {
MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
if (cfg->cd_gpio < 0)
return 1;
- debug("SD card %d is %spresent\n",
+ debug("SD card %d is %spresent (GPIO %d)\n",
cfg - tx6qdl_esdhc_cfg,
- gpio_get_value(cfg->cd_gpio) ? "NOT " : "");
+ gpio_get_value(cfg->cd_gpio) ? "NOT " : "",
+ cfg->cd_gpio);
return !gpio_get_value(cfg->cd_gpio);
}
int lvds_mapping = karo_fdt_get_lvds_mapping(working_fdt, 0);
int lvds_chan_mask = karo_fdt_get_lvds_channels(working_fdt);
uint32_t gpr2;
+ uint32_t gpr3;
if (lvds_chan_mask == 0) {
printf("No LVDS channel active\n");
gpr2 |= (lvds_chan_mask & 2) ? 3 << 2 : 0;
debug("writing %08x to GPR2[%08x]\n", gpr2, IOMUXC_BASE_ADDR + 8);
writel(gpr2, IOMUXC_BASE_ADDR + 8);
+
+ gpr3 = readl(IOMUXC_BASE_ADDR + 0xc);
+ gpr3 &= ~((3 << 8) | (3 << 6));
+ writel(gpr3, IOMUXC_BASE_ADDR + 0xc);
}
if (karo_load_splashimage(0) == 0) {
int ret;
{
unsigned long cpu_clk = getenv_ulong("cpu_clk", 10, 0);
- if (had_ctrlc() || (wrsr & WRSR_TOUT))
- return;
-
if (cpu_clk == 0 || cpu_clk == mxc_get_clock(MXC_ARM_CLK) / 1000000)
return;
+ if (had_ctrlc() || (wrsr & WRSR_TOUT)) {
+ printf("%s detected; skipping cpu clock change\n",
+ (wrsr & WRSR_TOUT) ? "WDOG RESET" : "<CTRL-C>");
+ return;
+ }
if (mxc_set_clock(CONFIG_SYS_MX6_HCLK, cpu_clk, MXC_ARM_CLK) == 0) {
cpu_clk = mxc_get_clock(MXC_ARM_CLK);
printf("CPU clock set to %lu.%03lu MHz\n",
check_cpu_temperature(1);
tx6qdl_set_cpu_clock();
- if (!had_ctrlc())
+
+ if (had_ctrlc())
+ setenv_ulong("safeboot", 1);
+ else if (wrsr & WRSR_TOUT)
+ setenv_ulong("wdreset", 1);
+ else
karo_fdt_move_fdt();
baseboard = getenv("baseboard");
}
#ifdef CONFIG_NO_NAND
-#ifdef CONFIG_MMC_BOOT_SIZE
-#define TX6_FLASH_SZ (CONFIG_MMC_BOOT_SIZE / 1024 - 1 + 2)
-#else
-#define TX6_FLASH_SZ 3
-#endif
+#define TX6_FLASH_SZ (CONFIG_MMC_BOOT_SIZE / 4096 + 2)
#else /* CONFIG_NO_NAND */
#define TX6_FLASH_SZ (CONFIG_SYS_NAND_BLOCKS / 1024 - 1)
#endif /* CONFIG_NO_NAND */
#define TX6_DDR_SZ 2
#endif
-#if CONFIG_TX6_REV >= 0x3
static char tx6_mem_table[] = {
- '4', /* 256MiB SDRAM; 128MiB NAND */
- '1', /* 512MiB SDRAM; 128MiB NAND */
- '0', /* 1GiB SDRAM; 128MiB NAND */
- '?', /* 256MiB SDRAM; 256MiB NAND */
- '?', /* 512MiB SDRAM; 256MiB NAND */
- '2', /* 1GiB SDRAM; 256MiB NAND */
- '?', /* 256MiB SDRAM; 4GiB eMMC */
- '5', /* 512MiB SDRAM; 4GiB eMMC */
- '3', /* 1GiB SDRAM; 4GiB eMMC */
- '?', /* 256MiB SDRAM; 8GiB eMMC */
- '?', /* 512MiB SDRAM; 8GiB eMMC */
- '?', /* 1GiB SDRAM; 8GiB eMMC */
+ '4', /* 256MiB SDRAM 16bit; 128MiB NAND */
+ '1', /* 512MiB SDRAM 32bit; 128MiB NAND */
+ '0', /* 1GiB SDRAM 64bit; 128MiB NAND */
+ '?', /* 256MiB SDRAM 16bit; 256MiB NAND */
+ '?', /* 512MiB SDRAM 32bit; 256MiB NAND */
+ '2', /* 1GiB SDRAM 64bit; 256MiB NAND */
+ '?', /* 256MiB SDRAM 16bit; 4GiB eMMC */
+ '5', /* 512MiB SDRAM 32bit; 4GiB eMMC */
+ '3', /* 1GiB SDRAM 64bit; 4GiB eMMC */
+ '?', /* 256MiB SDRAM 16bit; 8GiB eMMC */
+ '?', /* 512MiB SDRAM 32bit; 8GiB eMMC */
+ '0', /* 1GiB SDRAM 64bit; 8GiB eMMC */
};
static inline char tx6_mem_suffix(void)
return tx6_mem_table[mem_idx];
};
-#else /* CONFIG_TX6_REV >= 0x3 */
-static inline char tx6_mem_suffix(void)
+
+static struct {
+ uchar addr;
+ uchar rev;
+} tx6_mod_revs[] = {
+ { 0x3c, 1, },
+ { 0x32, 2, },
+ { 0x33, 3, },
+};
+
+static int tx6_get_mod_rev(void)
{
-#ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
- if (CONFIG_SYS_SDRAM_BUS_WIDTH == 32)
- return '1';
-#endif
-#ifdef CONFIG_SYS_NAND_BLOCKS
- if (CONFIG_SYS_NAND_BLOCKS == 2048)
- return '2';
-#endif
- return '0';
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(tx6_mod_revs); i++) {
+ int ret = i2c_probe(tx6_mod_revs[i].addr);
+ if (ret == 0) {
+ debug("I2C probe succeeded for addr %02x\n", tx6_mod_revs[i].addr);
+ return tx6_mod_revs[i].rev;
+ }
+ debug("I2C probe returned %d for addr %02x\n", ret,
+ tx6_mod_revs[i].addr);
+ }
+ return 0;
}
-#endif /* CONFIG_TX6_REV >= 0x3 */
int checkboard(void)
{
tx6qdl_print_cpuinfo();
+ i2c_init(CONFIG_SYS_I2C_SPEED, 0 /* unused */);
+
printf("Board: Ka-Ro TX6%s-%d%d%d%c\n",
tx6_mod_suffix,
cpu_variant == MXC_CPU_MX6Q ? 1 : 8,
- is_lvds(), CONFIG_TX6_REV,
+ is_lvds(), tx6_get_mod_rev(),
tx6_mem_suffix());
return 0;
projects / karo-tx-uboot.git / blobdiff