/*
- * Copyright (C) 2012,2013 Lothar Waßmann <LW@KARO-electronics.de>
+ * Copyright (C) 2012-2015 Lothar Waßmann <LW@KARO-electronics.de>
*
* See file CREDITS for list of people who contributed to this
* project.
* GNU General Public License for more details.
*
*/
-
#include <common.h>
#include <errno.h>
#include <libfdt.h>
#define TX6_RESET_OUT_GPIO IMX_GPIO_NR(7, 12)
-#define TEMPERATURE_MIN -40
+#ifdef CONFIG_MX6_TEMPERATURE_MIN
+#define TEMPERATURE_MIN CONFIG_MX6_TEMPERATURE_MIN
+#else
+#define TEMPERATURE_MIN (-40)
+#endif
+#ifdef CONFIG_MX6_TEMPERATURE_HOT
+#define TEMPERATURE_HOT CONFIG_MX6_TEMPERATURE_HOT
+#else
#define TEMPERATURE_HOT 80
-#define TEMPERATURE_MAX 125
+#endif
DECLARE_GLOBAL_DATA_PTR;
#define MUX_CFG_SION IOMUX_PAD(0, 0, IOMUX_CONFIG_SION, 0, 0, 0)
static const iomux_v3_cfg_t tx6qdl_pads[] = {
-#ifdef CONFIG_TX6_V2
+#ifndef CONFIG_NO_NAND
/* NAND flash pads */
MX6_PAD_NANDF_CLE__RAWNAND_CLE,
MX6_PAD_NANDF_ALE__RAWNAND_ALE,
printf("\n");
}
-int read_cpu_temperature(void);
-int check_cpu_temperature(int boot);
+static const char *tx6_mod_suffix;
static void tx6qdl_print_cpuinfo(void)
{
switch ((cpurev >> 12) & 0xff) {
case MXC_CPU_MX6SL:
cpu_str = "SL";
+ tx6_mod_suffix = "?";
break;
case MXC_CPU_MX6DL:
cpu_str = "DL";
+ tx6_mod_suffix = "U";
break;
case MXC_CPU_MX6SOLO:
cpu_str = "SOLO";
+ tx6_mod_suffix = "S";
break;
case MXC_CPU_MX6Q:
cpu_str = "Q";
+ tx6_mod_suffix = "Q";
break;
}
mxc_get_clock(MXC_ARM_CLK) / 1000000);
print_reset_cause();
+#ifdef CONFIG_MX6_TEMPERATURE_HOT
check_cpu_temperature(1);
+#endif
}
int board_early_init_f(void)
return 0;
}
+#ifndef CONFIG_MX6_TEMPERATURE_HOT
+static bool tx6_temp_check_enabled = true;
+#else
+#define tx6_temp_check_enabled 0
+#endif
+
int board_init(void)
{
int ret;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
gd->bd->bi_arch_number = -1;
- if (ctrlc()) {
- printf("CTRL-C detected; Skipping PMIC setup\n");
+ if (ctrlc() || (wrsr & WRSR_TOUT)) {
+ if (wrsr & WRSR_TOUT)
+ printf("WDOG RESET detected; Skipping PMIC setup\n");
+ else
+ printf("<CTRL-C> detected; safeboot enabled\n");
+#ifndef CONFIG_MX6_TEMPERATURE_HOT
+ tx6_temp_check_enabled = false;
+#endif
return 1;
}
- ret = setup_pmic_voltages();
+ ret = tx6_pmic_init();
if (ret) {
printf("Failed to setup PMIC voltages\n");
hang();
#ifdef CONFIG_CMD_MMC
#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
- PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
- PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST)
static const iomux_v3_cfg_t mmc0_pads[] = {
MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
if (cfg->cd_gpio < 0)
return 1;
- debug("SD card %d is %spresent\n",
+ debug("SD card %d is %spresent (GPIO %d)\n",
cfg - tx6qdl_esdhc_cfg,
- gpio_get_value(cfg->cd_gpio) ? "NOT " : "");
+ gpio_get_value(cfg->cd_gpio) ? "NOT " : "",
+ cfg->cd_gpio);
return !gpio_get_value(cfg->cd_gpio);
}
LED_STATE_ON,
};
-static inline int calc_blink_rate(int tmp)
+static inline int calc_blink_rate(void)
{
+ if (!tx6_temp_check_enabled)
+ return CONFIG_SYS_HZ;
+
return CONFIG_SYS_HZ + CONFIG_SYS_HZ / 10 -
- (tmp - TEMPERATURE_MIN) * CONFIG_SYS_HZ /
+ (check_cpu_temperature(0) - TEMPERATURE_MIN) * CONFIG_SYS_HZ /
(TEMPERATURE_HOT - TEMPERATURE_MIN);
}
last = get_timer(0);
gpio_set_value(TX6_LED_GPIO, 1);
led_state = LED_STATE_ON;
- blink_rate = calc_blink_rate(check_cpu_temperature(0));
+ blink_rate = calc_blink_rate();
} else {
if (get_timer(last) > blink_rate) {
- blink_rate = calc_blink_rate(check_cpu_temperature(0));
+ blink_rate = calc_blink_rate();
last = get_timer_masked();
if (led_state == LED_STATE_ON) {
gpio_set_value(TX6_LED_GPIO, 0);
int lvds_mapping = karo_fdt_get_lvds_mapping(working_fdt, 0);
int lvds_chan_mask = karo_fdt_get_lvds_channels(working_fdt);
uint32_t gpr2;
+ uint32_t gpr3;
if (lvds_chan_mask == 0) {
printf("No LVDS channel active\n");
gpr2 |= (lvds_chan_mask & 2) ? 3 << 2 : 0;
debug("writing %08x to GPR2[%08x]\n", gpr2, IOMUXC_BASE_ADDR + 8);
writel(gpr2, IOMUXC_BASE_ADDR + 8);
+
+ gpr3 = readl(IOMUXC_BASE_ADDR + 0xc);
+ gpr3 &= ~((3 << 8) | (3 << 6));
+ writel(gpr3, IOMUXC_BASE_ADDR + 0xc);
}
if (karo_load_splashimage(0) == 0) {
int ret;
debug("Initializing LCD controller\n");
- ret = ipuv3_fb_init(p, 0, pix_fmt, DI_PCLK_PLL3, di_clk_rate, -1);
+ ret = ipuv3_fb_init(p, 0, pix_fmt,
+ is_lvds() ? DI_PCLK_LDB : DI_PCLK_PLL3,
+ di_clk_rate, -1);
if (ret) {
printf("Failed to initialize FB driver: %d\n", ret);
lcd_enabled = 0;
{
unsigned long cpu_clk = getenv_ulong("cpu_clk", 10, 0);
- if (had_ctrlc() || (wrsr & WRSR_TOUT))
- return;
-
if (cpu_clk == 0 || cpu_clk == mxc_get_clock(MXC_ARM_CLK) / 1000000)
return;
+ if (had_ctrlc() || (wrsr & WRSR_TOUT)) {
+ printf("%s detected; skipping cpu clock change\n",
+ (wrsr & WRSR_TOUT) ? "WDOG RESET" : "<CTRL-C>");
+ return;
+ }
if (mxc_set_clock(CONFIG_SYS_MX6_HCLK, cpu_clk, MXC_ARM_CLK) == 0) {
cpu_clk = mxc_get_clock(MXC_ARM_CLK);
printf("CPU clock set to %lu.%03lu MHz\n",
int ret = 0;
const char *baseboard;
+ env_cleanup();
+
+ if (tx6_temp_check_enabled)
+ check_cpu_temperature(1);
+
tx6qdl_set_cpu_clock();
- karo_fdt_move_fdt();
+
+ if (had_ctrlc())
+ setenv_ulong("safeboot", 1);
+ else if (wrsr & WRSR_TOUT)
+ setenv_ulong("wdreset", 1);
+ else
+ karo_fdt_move_fdt();
baseboard = getenv("baseboard");
if (!baseboard)
return ret;
}
-#ifdef CONFIG_TX6_V2
-#define TX6_FLASH_SZ 0
+#ifdef CONFIG_NO_NAND
+#define TX6_FLASH_SZ (CONFIG_MMC_BOOT_SIZE / 4096 + 2)
+#else /* CONFIG_NO_NAND */
+#define TX6_FLASH_SZ (CONFIG_SYS_NAND_BLOCKS / 1024 - 1)
+#endif /* CONFIG_NO_NAND */
+
+#ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
+#define TX6_DDR_SZ (ffs(CONFIG_SYS_SDRAM_BUS_WIDTH / 16) - 1)
#else
-#define TX6_FLASH_SZ (2 * (CONFIG_SYS_NAND_BLOCKS / 1024 - 1))
+#define TX6_DDR_SZ 2
#endif
+static char tx6_mem_table[] = {
+ '4', /* 256MiB SDRAM 16bit; 128MiB NAND */
+ '1', /* 512MiB SDRAM 32bit; 128MiB NAND */
+ '0', /* 1GiB SDRAM 64bit; 128MiB NAND */
+ '?', /* 256MiB SDRAM 16bit; 256MiB NAND */
+ '?', /* 512MiB SDRAM 32bit; 256MiB NAND */
+ '2', /* 1GiB SDRAM 64bit; 256MiB NAND */
+ '?', /* 256MiB SDRAM 16bit; 4GiB eMMC */
+ '5', /* 512MiB SDRAM 32bit; 4GiB eMMC */
+ '3', /* 1GiB SDRAM 64bit; 4GiB eMMC */
+ '?', /* 256MiB SDRAM 16bit; 8GiB eMMC */
+ '?', /* 512MiB SDRAM 32bit; 8GiB eMMC */
+ '0', /* 1GiB SDRAM 64bit; 8GiB eMMC */
+};
+
+static inline char tx6_mem_suffix(void)
+{
+ size_t mem_idx = (TX6_FLASH_SZ * 3) + TX6_DDR_SZ;
+
+ debug("TX6_DDR_SZ=%d TX6_FLASH_SZ=%d idx=%d\n",
+ TX6_DDR_SZ, TX6_FLASH_SZ, mem_idx);
+
+ if (mem_idx >= ARRAY_SIZE(tx6_mem_table))
+ return '?';
+
+ return tx6_mem_table[mem_idx];
+};
+
+static struct {
+ uchar addr;
+ uchar rev;
+} tx6_mod_revs[] = {
+ { 0x3c, 1, },
+ { 0x32, 2, },
+ { 0x33, 3, },
+};
+
+static int tx6_get_mod_rev(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(tx6_mod_revs); i++) {
+ int ret = i2c_probe(tx6_mod_revs[i].addr);
+ if (ret == 0) {
+ debug("I2C probe succeeded for addr %02x\n", tx6_mod_revs[i].addr);
+ return tx6_mod_revs[i].rev;
+ }
+ debug("I2C probe returned %d for addr %02x\n", ret,
+ tx6_mod_revs[i].addr);
+ }
+ return 0;
+}
+
int checkboard(void)
{
u32 cpurev = get_cpu_rev();
tx6qdl_print_cpuinfo();
- printf("Board: Ka-Ro TX6%c-%d%d1%d\n",
- cpu_variant == MXC_CPU_MX6Q ? 'Q' : 'U',
+ i2c_init(CONFIG_SYS_I2C_SPEED, 0 /* unused */);
+
+ printf("Board: Ka-Ro TX6%s-%d%d%d%c\n",
+ tx6_mod_suffix,
cpu_variant == MXC_CPU_MX6Q ? 1 : 8,
- is_lvds(), 1 - PHYS_SDRAM_1_WIDTH / 64 +
- TX6_FLASH_SZ);
+ is_lvds(), tx6_get_mod_rev(),
+ tx6_mem_suffix());
return 0;
}
projects / karo-tx-uboot.git / blobdiff