#define TX6_FEC_RST_GPIO IMX_GPIO_NR(7, 6)
#define TX6_FEC_PWR_GPIO IMX_GPIO_NR(3, 20)
-#define TX6_FEC_INT_GPIO IMX_GPIO_NR(2, 4)
+#define TX6_FEC_INT_GPIO IMX_GPIO_NR(7, 1)
#define TX6_LED_GPIO IMX_GPIO_NR(2, 20)
#define TX6_LCD_PWR_GPIO IMX_GPIO_NR(2, 31)
struct fuse_bank5_regs *fuse = (void *)ocotp->bank[5].fuse_regs;
u32 pad_settings = readl(&fuse->pad_settings);
- debug("Fuse pad_settings @ %p = %08x\n",
+ debug("Fuse pad_settings @ %p = %02x\n",
&fuse->pad_settings, pad_settings);
return pad_settings & 1;
}
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
-#ifdef CONFIG_OF_LIBFDT
gd->bd->bi_arch_number = -1;
-#else
- gd->bd->bi_arch_number = 4429;
-#endif
+
if (ctrlc()) {
printf("CTRL-C detected; Skipping PMIC setup\n");
return 1;
}
+
ret = setup_pmic_voltages();
if (ret) {
printf("Failed to setup PMIC voltages\n");
};
#ifdef CONFIG_LCD
+static u16 tx6_cmap[256];
vidinfo_t panel_info = {
/* set to max. size supported by SoC */
.vl_col = 1920,
.vl_row = 1080,
.vl_bpix = LCD_COLOR24, /* Bits per pixel, 0: 1bpp, 1: 2bpp, 2: 4bpp, 3: 8bpp ... */
+ .cmap = tx6_cmap,
};
static struct fb_videomode tx6_fb_modes[] = {
.lower_margin = 525 - 480 - 35,
.sync = FB_SYNC_CLK_LAT_FALL,
},
+ {
+ /* Emerging ET070001DM6 800 x 480 display.
+ * 152.4 mm x 91.44 mm display area.
+ */
+ .name = "ET070001DM6",
+ .refresh = 60,
+ .xres = 800,
+ .yres = 480,
+ .pixclock = KHZ2PICOS(33260),
+ .left_margin = 216 - 128,
+ .hsync_len = 128,
+ .right_margin = 1056 - 800 - 216,
+ .upper_margin = 35 - 2,
+ .vsync_len = 2,
+ .lower_margin = 525 - 480 - 35,
+ .sync = 0,
+ },
#else
{
/* HannStar HSD100PXN1
struct fb_videomode *p = &tx6_fb_modes[0];
struct fb_videomode fb_mode;
int xres_set = 0, yres_set = 0, bpp_set = 0, refresh_set = 0;
- int pix_fmt = is_lvds() ? IPU_PIX_FMT_LVDS666 : IPU_PIX_FMT_RGB24;
+ int pix_fmt;
+ int lcd_bus_width;
unsigned long di_clk_rate = 65000000;
if (!lcd_enabled) {
switch (val) {
case 32:
case 24:
- if (pix_fmt == IPU_PIX_FMT_LVDS666)
+ if (is_lvds())
pix_fmt = IPU_PIX_FMT_LVDS888;
/* fallthru */
case 16:
break;
case 18:
- if (pix_fmt == IPU_PIX_FMT_LVDS666) {
+ if (is_lvds()) {
color_depth = val;
break;
}
imx_iomux_v3_setup_multiple_pads(stk5_lcd_pads,
ARRAY_SIZE(stk5_lcd_pads));
- debug("Initializing FB driver\n");
-#ifdef CONFIG_SYS_LVDS_IF
- if (pix_fmt == IPU_PIX_FMT_LVDS666) {
- writel(0x01, IOMUXC_BASE_ADDR + 8);
- } else if (pix_fmt == IPU_PIX_FMT_LVDS888) {
- writel(0x21, IOMUXC_BASE_ADDR + 8);
+ lcd_bus_width = karo_fdt_get_lcd_bus_width(working_fdt, 24);
+ switch (lcd_bus_width) {
+ case 24:
+ pix_fmt = is_lvds() ? IPU_PIX_FMT_LVDS888 : IPU_PIX_FMT_RGB24;
+ break;
+
+ case 18:
+ pix_fmt = is_lvds() ? IPU_PIX_FMT_LVDS666 : IPU_PIX_FMT_RGB666;
+ break;
+
+ case 16:
+ if (!is_lvds()) {
+ pix_fmt = IPU_PIX_FMT_RGB565;
+ break;
+ }
+ /* fallthru */
+ default:
+ lcd_enabled = 0;
+ printf("Invalid %s bus width: %d\n", is_lvds() ? "LVDS" : "LCD",
+ lcd_bus_width);
+ return;
}
- {
- struct mxc_ccm_reg *ccm_regs = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
- /* enable LDB & DI0 clock */
- writel(readl(&ccm_regs->CCGR3) | MXC_CCM_CCGR3_LDB_DI0_MASK |
- MXC_CCM_CCGR3_IPU1_IPU_DI0_MASK,
- &ccm_regs->CCGR3);
+ if (is_lvds()) {
+ int lvds_mapping = karo_fdt_get_lvds_mapping(working_fdt, 0);
+ int lvds_chan_mask = karo_fdt_get_lvds_channels(working_fdt);
+ uint32_t gpr2;
+
+ if (lvds_chan_mask == 0) {
+ printf("No LVDS channel active\n");
+ lcd_enabled = 0;
+ return;
+ }
+
+ gpr2 = (lvds_mapping << 6) | (lvds_mapping << 8);
+ if (lcd_bus_width == 24)
+ gpr2 |= (1 << 5) | (1 << 7);
+ gpr2 |= (lvds_chan_mask & 1) ? 1 << 0 : 0;
+ gpr2 |= (lvds_chan_mask & 2) ? 3 << 2 : 0;
+ debug("writing %08x to GPR2[%08x]\n", gpr2, IOMUXC_BASE_ADDR + 8);
+ writel(gpr2, IOMUXC_BASE_ADDR + 8);
}
-#endif
if (karo_load_splashimage(0) == 0) {
+ int ret;
+
debug("Initializing LCD controller\n");
- ipuv3_fb_init(p, 0, pix_fmt, DI_PCLK_PLL3, di_clk_rate, -1);
+ ret = ipuv3_fb_init(p, 0, pix_fmt, DI_PCLK_PLL3, di_clk_rate, -1);
+ if (ret) {
+ printf("Failed to initialize FB driver: %d\n", ret);
+ lcd_enabled = 0;
+ }
} else {
debug("Skipping initialization of LCD controller\n");
}
printf("CPU clock set to %lu.%03lu MHz\n",
cpu_clk / 1000000, cpu_clk / 1000 % 1000);
} else {
- printf("Failed to set CPU clock to %lu MHz\n", cpu_clk);
+ printf("Error: Failed to set CPU clock to %lu MHz\n", cpu_clk);
}
}
return;
}
- eth_setenv_enetaddr("ethaddr", mac);
printf("MAC addr from fuse: %pM\n", mac);
+ eth_setenv_enetaddr("ethaddr", mac);
}
int board_late_init(void)
static const char *tx6_touchpanels[] = {
"ti,tsc2007",
"edt,edt-ft5x06",
+ "eeti,egalax_ts",
};
void ft_board_setup(void *blob, bd_t *bd)