#include <mpc83xx.h>
#include <asm/mpc8349_pci.h>
#include <i2c.h>
-#include <spd.h>
-#include <miiphy.h>
-#if defined(CONFIG_SPD_EEPROM)
#include <spd_sdram.h>
-#endif
+#include <miiphy.h>
#if defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
#endif
#define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1)
-long int initdram (int board_type)
+phys_size_t initdram (int board_type)
{
volatile immap_t *im = (immap_t *)CFG_IMMR;
u32 msize = 0;
return -1;
}
}
- im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+ im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
#if (CFG_DDR_SIZE != 256)