Merge branch 'master' of git://git.denx.de/u-boot-ti

[karo-tx-uboot.git] / board / sunxi / board.c

diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index b05d0b9b18c9a5fdc7442de3286edb9838da95bd..7d6d075f145ee93d4e3463544b7ccd3694ec9771 100644 (file)
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -12,10 +12,24 @@
  */
 
 #include <common.h>
+#include <mmc.h>
+#ifdef CONFIG_AXP152_POWER
+#include <axp152.h>
+#endif
+#ifdef CONFIG_AXP209_POWER
+#include <axp209.h>
+#endif
+#ifdef CONFIG_AXP221_POWER
+#include <axp221.h>
+#endif
 #include <asm/arch/clock.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/display.h>
 #include <asm/arch/dram.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
+#include <asm/io.h>
+#include <net.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -61,9 +75,9 @@ static void mmc_pinmux_setup(int sdc)
                break;
 
        case 1:
-               /* CMD-PH22, CLK-PH23, D0~D3-PH24~27 : 5 */
-               for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) {
-                       sunxi_gpio_set_cfgpin(pin, SUN4I_GPH22_SDC1);
+               /* CMD-PG3, CLK-PG4, D0~D3-PG5-8 */
+               for (pin = SUNXI_GPG(3); pin <= SUNXI_GPG(8); pin++) {
+                       sunxi_gpio_set_cfgpin(pin, SUN5I_GPG3_SDC1);
                        sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP);
                        sunxi_gpio_set_drv(pin, 2);
                }
@@ -95,26 +109,133 @@ static void mmc_pinmux_setup(int sdc)
 
 int board_mmc_init(bd_t *bis)
 {
+       __maybe_unused struct mmc *mmc0, *mmc1;
+       __maybe_unused char buf[512];
+
        mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT);
-       sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT);
-#if !defined (CONFIG_SPL_BUILD) && defined (CONFIG_MMC_SUNXI_SLOT_EXTRA)
+       mmc0 = sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT);
+       if (!mmc0)
+               return -1;
+
+#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
        mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT_EXTRA);
-       sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT_EXTRA);
+       mmc1 = sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT_EXTRA);
+       if (!mmc1)
+               return -1;
+#endif
+
+#if CONFIG_MMC_SUNXI_SLOT == 0 && CONFIG_MMC_SUNXI_SLOT_EXTRA == 2
+       /*
+        * Both mmc0 and mmc2 are bootable, figure out where we're booting
+        * from. Try mmc0 first, just like the brom does.
+        */
+       if (mmc_getcd(mmc0) && mmc_init(mmc0) == 0 &&
+           mmc0->block_dev.block_read(0, 16, 1, buf) == 1) {
+               buf[12] = 0;
+               if (strcmp(&buf[4], "eGON.BT0") == 0)
+                       return 0;
+       }
+
+       /* no bootable card in mmc0, so we must be booting from mmc2, swap */
+       mmc0->block_dev.dev = 1;
+       mmc1->block_dev.dev = 0;
 #endif
 
        return 0;
 }
 #endif
 
+void i2c_init_board(void)
+{
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUNXI_GPB0_TWI0);
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUNXI_GPB0_TWI0);
+       clock_twi_onoff(0, 1);
+}
+
 #ifdef CONFIG_SPL_BUILD
 void sunxi_board_init(void)
 {
+       int power_failed = 0;
        unsigned long ramsize;
 
+#ifdef CONFIG_AXP152_POWER
+       power_failed = axp152_init();
+       power_failed |= axp152_set_dcdc2(1400);
+       power_failed |= axp152_set_dcdc3(1500);
+       power_failed |= axp152_set_dcdc4(1250);
+       power_failed |= axp152_set_ldo2(3000);
+#endif
+#ifdef CONFIG_AXP209_POWER
+       power_failed |= axp209_init();
+       power_failed |= axp209_set_dcdc2(1400);
+       power_failed |= axp209_set_dcdc3(1250);
+       power_failed |= axp209_set_ldo2(3000);
+       power_failed |= axp209_set_ldo3(2800);
+       power_failed |= axp209_set_ldo4(2800);
+#endif
+#ifdef CONFIG_AXP221_POWER
+       power_failed = axp221_init();
+       power_failed |= axp221_set_dcdc1(CONFIG_AXP221_DCDC1_VOLT);
+       power_failed |= axp221_set_dcdc2(1200); /* A31:VDD-GPU, A23:VDD-SYS */
+       power_failed |= axp221_set_dcdc3(1200); /* VDD-CPU */
+#ifdef CONFIG_MACH_SUN6I
+       power_failed |= axp221_set_dcdc4(1200); /* A31:VDD-SYS */
+#else
+       power_failed |= axp221_set_dcdc4(0);    /* A23:unused */
+#endif
+       power_failed |= axp221_set_dcdc5(1500); /* VCC-DRAM */
+       power_failed |= axp221_set_dldo1(CONFIG_AXP221_DLDO1_VOLT);
+       power_failed |= axp221_set_dldo4(CONFIG_AXP221_DLDO4_VOLT);
+       power_failed |= axp221_set_aldo1(CONFIG_AXP221_ALDO1_VOLT);
+       power_failed |= axp221_set_aldo2(CONFIG_AXP221_ALDO2_VOLT);
+       power_failed |= axp221_set_aldo3(CONFIG_AXP221_ALDO3_VOLT);
+#endif
+
        printf("DRAM:");
        ramsize = sunxi_dram_init();
        printf(" %lu MiB\n", ramsize >> 20);
        if (!ramsize)
                hang();
+
+       /*
+        * Only clock up the CPU to full speed if we are reasonably
+        * assured it's being powered with suitable core voltage
+        */
+       if (!power_failed)
+               clock_set_pll1(CONFIG_CLK_FULL_SPEED);
+       else
+               printf("Failed to set core voltage! Can't set CPU frequency\n");
+}
+#endif
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+       unsigned int sid[4];
+
+       if (!getenv("ethaddr") && sunxi_get_sid(sid) == 0 &&
+                       sid[0] != 0 && sid[3] != 0) {
+               uint8_t mac_addr[6];
+
+               mac_addr[0] = 0x02; /* Non OUI / registered MAC address */
+               mac_addr[1] = (sid[0] >>  0) & 0xff;
+               mac_addr[2] = (sid[3] >> 24) & 0xff;
+               mac_addr[3] = (sid[3] >> 16) & 0xff;
+               mac_addr[4] = (sid[3] >>  8) & 0xff;
+               mac_addr[5] = (sid[3] >>  0) & 0xff;
+
+               eth_setenv_enetaddr("ethaddr", mac_addr);
+       }
+
+       return 0;
 }
 #endif
+
+#ifdef CONFIG_OF_BOARD_SETUP
+int ft_board_setup(void *blob, bd_t *bd)
+{
+#ifdef CONFIG_VIDEO_DT_SIMPLEFB
+       return sunxi_simplefb_setup(blob);
+#endif
+}
+#endif /* CONFIG_OF_BOARD_SETUP */