Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / board / ti / dra7xx / mux_data.h

diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h
index ec8342276b64688ad41cb5eb0aae5c11e203f5f3..7db70324e9bc78a5d301bbbb1f75331969e77451 100644 (file)
--- a/board/ti/dra7xx/mux_data.h
+++ b/board/ti/dra7xx/mux_data.h
@@ -31,11 +31,53 @@ const struct pad_conf_entry core_padconf_array_essential[] = {
        {GPMC_A26, (IEN | PTU | PDIS | M1)},    /* mmc2_dat2 */
        {GPMC_A27, (IEN | PTU | PDIS | M1)},    /* mmc2_dat3 */
        {GPMC_CS1, (IEN | PTU | PDIS | M1)},    /* mmm2_cmd */
+#if (CONFIG_CONS_INDEX == 1)
        {UART1_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_RXD */
        {UART1_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART1_TXD */
        {UART1_CTSN, (IEN | PTU | PDIS | M3)},  /* UART1_CTSN */
        {UART1_RTSN, (IEN | PTU | PDIS | M3)},  /* UART1_RTSN */
+#elif (CONFIG_CONS_INDEX == 3)
+       {UART3_RXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_RXD */
+       {UART3_TXD, (FSC | IEN | PTU | PDIS | M0)}, /* UART3_TXD */
+#endif
        {I2C1_SDA, (IEN | PTU | PDIS | M0)},    /* I2C1_SDA */
        {I2C1_SCL, (IEN | PTU | PDIS | M0)},    /* I2C1_SCL */
+       {MDIO_MCLK, (PTU | PEN | M0)},          /* MDIO_MCLK  */
+       {MDIO_D, (IEN | PTU | PEN | M0)},       /* MDIO_D  */
+       {RGMII0_TXC, (M0) },
+       {RGMII0_TXCTL, (M0) },
+       {RGMII0_TXD3, (M0) },
+       {RGMII0_TXD2, (M0) },
+       {RGMII0_TXD1, (M0) },
+       {RGMII0_TXD0, (M0) },
+       {RGMII0_RXC, (IEN | M0) },
+       {RGMII0_RXCTL, (IEN | M0) },
+       {RGMII0_RXD3, (IEN | M0) },
+       {RGMII0_RXD2, (IEN | M0) },
+       {RGMII0_RXD1, (IEN | M0) },
+       {RGMII0_RXD0, (IEN | M0) },
+       {VIN2A_D12, (M3) },
+       {VIN2A_D13, (M3) },
+       {VIN2A_D14, (M3) },
+       {VIN2A_D15, (M3) },
+       {VIN2A_D16, (M3) },
+       {VIN2A_D17, (M3) },
+       {VIN2A_D18, (IEN | M3)},
+       {VIN2A_D19, (IEN | M3)},
+       {VIN2A_D20, (IEN | M3)},
+       {VIN2A_D21, (IEN | M3)},
+       {VIN2A_D22, (IEN | M3)},
+       {VIN2A_D23, (IEN | M3)},
+       {GPMC_A13, (IEN | PDIS | M1)},  /* QSPI1_RTCLK */
+       {GPMC_A14, (IEN | PDIS | M1)},  /* QSPI1_D[3] */
+       {GPMC_A15, (IEN | PDIS | M1)},  /* QSPI1_D[2] */
+       {GPMC_A16, (IEN | PDIS | M1)},  /* QSPI1_D[1] */
+       {GPMC_A17, (IEN | PDIS | M1)},  /* QSPI1_D[0] */
+       {GPMC_A18, (M1)},  /* QSPI1_SCLK */
+       {GPMC_A3, (IEN | PDIS | M1)},   /* QSPI1_CS2 */
+       {GPMC_A4, (IEN | PDIS | M1)},   /* QSPI1_CS3 */
+       {GPMC_CS2, (IEN | PTU | PDIS | M1)},    /* QSPI1_CS0 */
+       {GPMC_CS3, (IEN | PTU | PDIS | M1)},    /* QSPI1_CS1*/
+       {USB2_DRVVBUS, (M0 | IEN | FSC) },
 };
 #endif /* _MUX_DATA_DRA7XX_H_ */