Compile the source
------------------
-PH1-sLD3:
- $ make ph1_sld3_defconfig
+PH1-sLD3 reference board:
+ $ make uniphier_sld3_defconfig
$ make CROSS_COMPILE=arm-linux-gnueabi-
-PH1-LD4:
- $ make ph1_ld4_defconfig
+PH1-LD4 reference board:
+ $ make uniphier_ld4_sld8_defconfig
$ make CROSS_COMPILE=arm-linux-gnueabi-
-PH1-Pro4:
- $ make ph1_pro4_defconfig
- $ make CROSS_COMPILE=arm-linux-gnueabi-
+PH1-sLD8 reference board:
+ $ make uniphier_ld4_sld8_defconfig
+ $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-sld8-ref
-PH1-sLD8:
- $ make ph1_sld8_defconfig
+PH1-Pro4 reference board:
+ $ make uniphier_pro4_defconfig
$ make CROSS_COMPILE=arm-linux-gnueabi-
-PH1-Pro5:
- $ make ph1_pro5_defconfig
- $ make CROSS_COMPILE=arm-linux-gnueabi-
+PH1-Pro4 Ace board:
+ $ make uniphier_pro4_defconfig
+ $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro4-ace
-ProXstream2:
- $ make pxs2_defconfig
- $ make CROSS_COMPILE=arm-linux-gnueabi-
+PH1-Pro4 Sanji board:
+ $ make uniphier_pro4_defconfig
+ $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro4-sanji
+
+PH1-Pro5 4KBOX Board:
+ $ make uniphier_pxs2_ld6b_defconfig
+ $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro5-4kbox
+
+ProXstream2 Gentil board:
+ $ make uniphier_pxs2_ld6b_defconfig
+ $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-proxstream2-gentil
-PH1-LD6b:
- $ make ph1_ld6b_defconfig
+ProXstream2 Vodka board:
+ $ make uniphier_pxs2_ld6b_defconfig
$ make CROSS_COMPILE=arm-linux-gnueabi-
+PH1-LD6b reference board:
+ $ make uniphier_pxs2_ld6b_defconfig
+ $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld6b-ref
+
You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-"
to use your favorite compiler.
Burn U-Boot images to NAND
--------------------------
-Write two files to the NAND device as follows:
- - spl/u-boot-spl-dtb.bin at the offset address 0x00000000
- - u-boot-dtb.img at the offset address 0x00010000
+Write the following to the NAND device:
+
+ - spl/u-boot-spl.bin at the offset address 0x00000000
+ - u-boot.bin at the offset address 0x00010000
+
+or
+
+ - u-boot-with-spl.bin at the offset address 0x00000000
If a TFTP server is available, the images can be easily updated.
-Just copy the u-boot-spl-dtb.bin and u-boot-dtb.img to the TFTP public
-directory, and then run the following command at the U-Boot command line:
+Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory,
+and then run the following command at the U-Boot command line:
=> run nandupdate
+Burn U-Boot images to eMMC
+--------------------------
+
+Write the following to the Boot partition 1 of the eMMC device:
+
+ - spl/u-boot-spl.bin at the offset address 0x00000000
+ - u-boot.bin at the offset address 0x00010000
+
+or
+
+ - u-boot-with-spl.bin at the offset address 0x00000000
+
+If a TFTP server is available, the images can be easily updated.
+Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory,
+and then run the following command at the U-Boot command line:
+
+ => run emmcupdate
+
+
UniPhier specific commands
--------------------------
- UART (on-chip)
- NAND
+ - SD/eMMC
- USB 2.0 (EHCI)
- USB 3.0 (xHCI)
+ - GPIO
- LAN (on-board SMSC9118)
- I2C
- EEPROM (connected to the on-board I2C bus)
SW8 OFF(1)/ON(0) Description
------------------------------------------
- bit 1 ----> CS1_SPLIT
+ bit 1 <---- CS1_SPLIT
bit 2 <---- CASE9_ON
bit 3 <---- CASE10_ON
bit 4 Don't Care Reserve
--
Masahiro Yamada <yamada.masahiro@socionext.com>
-Aug. 2015
+Feb. 2016