clk: pxa: keep clocks initialization separated per variant

[karo-tx-linux.git] / drivers / clk / pxa / clk-pxa.c

diff --git a/drivers/clk/pxa/clk-pxa.c b/drivers/clk/pxa/clk-pxa.c
index ef3c05389c0aeb4704a6f2c2e23720eda6311a83..4e834753ab094500677811702c37ad005503929b 100644 (file)
--- a/drivers/clk/pxa/clk-pxa.c
+++ b/drivers/clk/pxa/clk-pxa.c
@@ -26,12 +26,20 @@ static struct clk_onecell_data onecell_data = {
        .clk_num = CLK_MAX,
 };
 
-#define to_pxa_clk(_hw) container_of(_hw, struct pxa_clk_cken, hw)
+struct pxa_clk {
+       struct clk_hw hw;
+       struct clk_fixed_factor lp;
+       struct clk_fixed_factor hp;
+       struct clk_gate gate;
+       bool (*is_in_low_power)(void);
+};
+
+#define to_pxa_clk(_hw) container_of(_hw, struct pxa_clk, hw)
 
 static unsigned long cken_recalc_rate(struct clk_hw *hw,
                                      unsigned long parent_rate)
 {
-       struct pxa_clk_cken *pclk = to_pxa_clk(hw);
+       struct pxa_clk *pclk = to_pxa_clk(hw);
        struct clk_fixed_factor *fix;
 
        if (!pclk->is_in_low_power || pclk->is_in_low_power())
@@ -48,7 +56,7 @@ static struct clk_ops cken_rate_ops = {
 
 static u8 cken_get_parent(struct clk_hw *hw)
 {
-       struct pxa_clk_cken *pclk = to_pxa_clk(hw);
+       struct pxa_clk *pclk = to_pxa_clk(hw);
 
        if (!pclk->is_in_low_power)
                return 0;
@@ -69,29 +77,32 @@ void __init clkdev_pxa_register(int ckid, const char *con_id,
                clk_register_clkdev(clk, con_id, dev_id);
 }
 
-int __init clk_pxa_cken_init(struct pxa_clk_cken *clks, int nb_clks)
+int __init clk_pxa_cken_init(const struct desc_clk_cken *clks, int nb_clks)
 {
        int i;
-       struct pxa_clk_cken *pclk;
+       struct pxa_clk *pxa_clk;
        struct clk *clk;
 
        for (i = 0; i < nb_clks; i++) {
-               pclk = clks + i;
-               pclk->gate.lock = &lock;
-               clk = clk_register_composite(NULL, pclk->name,
-                                            pclk->parent_names, 2,
-                                            &pclk->hw, &cken_mux_ops,
-                                            &pclk->hw, &cken_rate_ops,
-                                            &pclk->gate.hw, &clk_gate_ops,
-                                            pclk->flags);
-               clkdev_pxa_register(pclk->ckid, pclk->con_id, pclk->dev_id,
-                                   clk);
+               pxa_clk = kzalloc(sizeof(*pxa_clk), GFP_KERNEL);
+               pxa_clk->is_in_low_power = clks[i].is_in_low_power;
+               pxa_clk->lp = clks[i].lp;
+               pxa_clk->hp = clks[i].hp;
+               pxa_clk->gate = clks[i].gate;
+               pxa_clk->gate.lock = &lock;
+               clk = clk_register_composite(NULL, clks[i].name,
+                                            clks[i].parent_names, 2,
+                                            &pxa_clk->hw, &cken_mux_ops,
+                                            &pxa_clk->hw, &cken_rate_ops,
+                                            &pxa_clk->gate.hw, &clk_gate_ops,
+                                            clks[i].flags);
+               clkdev_pxa_register(clks[i].ckid, clks[i].con_id,
+                                   clks[i].dev_id, clk);
        }
        return 0;
 }
 
-static void __init pxa_dt_clocks_init(struct device_node *np)
+void __init clk_pxa_dt_common_init(struct device_node *np)
 {
        of_clk_add_provider(np, of_clk_src_onecell_get, &onecell_data);
 }
-CLK_OF_DECLARE(pxa_clks, "marvell,pxa-clocks", pxa_dt_clocks_init);