Pull misc-2.6.40 into release branch

[mv-sheeva.git] / drivers / dma / dw_dmac.c

diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index 6ab440e532bf8a62829f82a377b5a804c802b37a..9c25c7d099e494be5ddee2bed8276932c9a2e7eb 100644 (file)
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -36,9 +36,11 @@
                struct dw_dma_slave *__slave = (private);       \
                int dms = __slave ? __slave->dst_master : 0;    \
                int sms = __slave ? __slave->src_master : 1;    \
+               u8 smsize = __slave ? __slave->src_msize : DW_DMA_MSIZE_16; \
+               u8 dmsize = __slave ? __slave->dst_msize : DW_DMA_MSIZE_16; \
                                                                \
-               (DWC_CTLL_DST_MSIZE(0)                          \
-                | DWC_CTLL_SRC_MSIZE(0)                        \
+               (DWC_CTLL_DST_MSIZE(dmsize)                     \
+                | DWC_CTLL_SRC_MSIZE(smsize)                   \
                 | DWC_CTLL_LLP_D_EN                            \
                 | DWC_CTLL_LLP_S_EN                            \
                 | DWC_CTLL_DMS(dms)                            \
@@ -683,7 +685,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
                                | DWC_CTLL_DST_WIDTH(reg_width)
                                | DWC_CTLL_DST_FIX
                                | DWC_CTLL_SRC_INC
-                               | DWC_CTLL_FC_M2P);
+                               | DWC_CTLL_FC(dws->fc));
                reg = dws->tx_reg;
                for_each_sg(sgl, sg, sg_len, i) {
                        struct dw_desc  *desc;
@@ -728,7 +730,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
                                | DWC_CTLL_SRC_WIDTH(reg_width)
                                | DWC_CTLL_DST_INC
                                | DWC_CTLL_SRC_FIX
-                               | DWC_CTLL_FC_P2M);
+                               | DWC_CTLL_FC(dws->fc));
 
                reg = dws->rx_reg;
                for_each_sg(sgl, sg, sg_len, i) {
@@ -901,8 +903,11 @@ static int dwc_alloc_chan_resources(struct dma_chan *chan)
                BUG_ON(!dws->dma_dev || dws->dma_dev != dw->dma.dev);
 
                cfghi = dws->cfg_hi;
-               cfglo = dws->cfg_lo;
+               cfglo = dws->cfg_lo & ~DWC_CFGL_CH_PRIOR_MASK;
        }
+
+       cfglo |= DWC_CFGL_CH_PRIOR(dwc->priority);
+
        channel_writel(dwc, CFG_LO, cfglo);
        channel_writel(dwc, CFG_HI, cfghi);
 
@@ -1143,7 +1148,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
                                        | DWC_CTLL_SRC_WIDTH(reg_width)
                                        | DWC_CTLL_DST_FIX
                                        | DWC_CTLL_SRC_INC
-                                       | DWC_CTLL_FC_M2P
+                                       | DWC_CTLL_FC(dws->fc)
                                        | DWC_CTLL_INT_EN);
                        break;
                case DMA_FROM_DEVICE:
@@ -1154,7 +1159,7 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
                                        | DWC_CTLL_DST_WIDTH(reg_width)
                                        | DWC_CTLL_DST_INC
                                        | DWC_CTLL_SRC_FIX
-                                       | DWC_CTLL_FC_P2M
+                                       | DWC_CTLL_FC(dws->fc)
                                        | DWC_CTLL_INT_EN);
                        break;
                default:
@@ -1319,7 +1324,17 @@ static int __init dw_probe(struct platform_device *pdev)
                dwc->chan.device = &dw->dma;
                dwc->chan.cookie = dwc->completed = 1;
                dwc->chan.chan_id = i;
-               list_add_tail(&dwc->chan.device_node, &dw->dma.channels);
+               if (pdata->chan_allocation_order == CHAN_ALLOCATION_ASCENDING)
+                       list_add_tail(&dwc->chan.device_node,
+                                       &dw->dma.channels);
+               else
+                       list_add(&dwc->chan.device_node, &dw->dma.channels);
+
+               /* 7 is highest priority & 0 is lowest. */
+               if (pdata->chan_priority == CHAN_PRIORITY_ASCENDING)
+                       dwc->priority = 7 - i;
+               else
+                       dwc->priority = i;
 
                dwc->ch_regs = &__dw_regs(dw)->CHAN[i];
                spin_lock_init(&dwc->lock);