};
struct amd64_pvt {
+ struct low_ops *ops;
+
/* pci_device handles which we utilize */
struct pci_dev *addr_f1_ctl;
struct pci_dev *dram_f2_ctl;
int mc_node_id; /* MC index of this MC node */
int ext_model; /* extended model value of this node */
-
- struct low_ops *ops; /* pointer to per PCI Device ID func table */
-
int channel_count;
/* Raw registers */
u32 nbctl_mcgctl_saved; /* When true, following 2 are valid */
u32 old_nbctl;
- /* MC Type Index value: socket F vs Family 10h */
- u32 mc_type_index;
-
/* DCT per-family scrubrate setting */
u32 min_scrubrate;
struct low_ops ops;
};
-static struct amd64_family_type amd64_family_types[];
-
-static inline struct low_ops *family_ops(int index)
-{
- return &amd64_family_types[index].ops;
-}
-
static inline int amd64_read_pci_cfg_dword(struct pci_dev *pdev, int offset,
u32 *val, const char *func)
{