Merge tag 'omapdrm-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux...

[karo-tx-linux.git] / drivers / gpu / drm / i915 / i915_debugfs.c

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 6fe7934b2894ef29aebf94795917d385e72a1522..b2b46c52294c6d4d9c2a20890fafaa4b122e7fa3 100644 (file)
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1178,6 +1178,50 @@ static int ironlake_drpc_info(struct seq_file *m)
        return 0;
 }
 
+static int vlv_drpc_info(struct seq_file *m)
+{
+
+       struct drm_info_node *node = (struct drm_info_node *) m->private;
+       struct drm_device *dev = node->minor->dev;
+       struct drm_i915_private *dev_priv = dev->dev_private;
+       u32 rpmodectl1, rcctl1;
+       unsigned fw_rendercount = 0, fw_mediacount = 0;
+
+       rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
+       rcctl1 = I915_READ(GEN6_RC_CONTROL);
+
+       seq_printf(m, "Video Turbo Mode: %s\n",
+                  yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
+       seq_printf(m, "Turbo enabled: %s\n",
+                  yesno(rpmodectl1 & GEN6_RP_ENABLE));
+       seq_printf(m, "HW control enabled: %s\n",
+                  yesno(rpmodectl1 & GEN6_RP_ENABLE));
+       seq_printf(m, "SW control enabled: %s\n",
+                  yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
+                         GEN6_RP_MEDIA_SW_MODE));
+       seq_printf(m, "RC6 Enabled: %s\n",
+                  yesno(rcctl1 & (GEN7_RC_CTL_TO_MODE |
+                                       GEN6_RC_CTL_EI_MODE(1))));
+       seq_printf(m, "Render Power Well: %s\n",
+                       (I915_READ(VLV_GTLC_PW_STATUS) &
+                               VLV_GTLC_PW_RENDER_STATUS_MASK) ? "Up" : "Down");
+       seq_printf(m, "Media Power Well: %s\n",
+                       (I915_READ(VLV_GTLC_PW_STATUS) &
+                               VLV_GTLC_PW_MEDIA_STATUS_MASK) ? "Up" : "Down");
+
+       spin_lock_irq(&dev_priv->uncore.lock);
+       fw_rendercount = dev_priv->uncore.fw_rendercount;
+       fw_mediacount = dev_priv->uncore.fw_mediacount;
+       spin_unlock_irq(&dev_priv->uncore.lock);
+
+       seq_printf(m, "Forcewake Render Count = %u\n", fw_rendercount);
+       seq_printf(m, "Forcewake Media Count = %u\n", fw_mediacount);
+
+
+       return 0;
+}
+
+
 static int gen6_drpc_info(struct seq_file *m)
 {
 
@@ -1283,7 +1327,9 @@ static int i915_drpc_info(struct seq_file *m, void *unused)
        struct drm_info_node *node = (struct drm_info_node *) m->private;
        struct drm_device *dev = node->minor->dev;
 
-       if (IS_GEN6(dev) || IS_GEN7(dev))
+       if (IS_VALLEYVIEW(dev))
+               return vlv_drpc_info(m);
+       else if (IS_GEN6(dev) || IS_GEN7(dev))
                return gen6_drpc_info(m);
        else
                return ironlake_drpc_info(m);
@@ -1295,7 +1341,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
        struct drm_device *dev = node->minor->dev;
        drm_i915_private_t *dev_priv = dev->dev_private;
 
-       if (!I915_HAS_FBC(dev)) {
+       if (!HAS_FBC(dev)) {
                seq_puts(m, "FBC unsupported on this chipset\n");
                return 0;
        }
@@ -1357,7 +1403,7 @@ static int i915_ips_status(struct seq_file *m, void *unused)
                return 0;
        }
 
-       if (I915_READ(IPS_CTL) & IPS_ENABLE)
+       if (IS_BROADWELL(dev) || I915_READ(IPS_CTL) & IPS_ENABLE)
                seq_puts(m, "enabled\n");
        else
                seq_puts(m, "disabled\n");