]> git.karo-electronics.de Git - karo-tx-linux.git/blobdiff - drivers/gpu/drm/i915/i915_drv.h
drm/i915: mark GEM object pages dirty when mapped & written by the CPU
[karo-tx-linux.git] / drivers / gpu / drm / i915 / i915_drv.h
index 256a3bcc5f70a4b15a97bf52d36058d4a5d08d5e..4c611b57e07bbed30ba7ce3ce60f756b1bc09801 100644 (file)
@@ -57,7 +57,7 @@
 
 #define DRIVER_NAME            "i915"
 #define DRIVER_DESC            "Intel Graphics"
-#define DRIVER_DATE            "20151120"
+#define DRIVER_DATE            "20151204"
 
 #undef WARN_ON
 /* Many gcc seem to no see through this and fall over :( */
@@ -763,6 +763,7 @@ struct intel_csr {
        func(is_crestline) sep \
        func(is_ivybridge) sep \
        func(is_valleyview) sep \
+       func(is_cherryview) sep \
        func(is_haswell) sep \
        func(is_skylake) sep \
        func(is_broxton) sep \
@@ -902,7 +903,6 @@ struct i915_fbc {
        /* This is always the inner lock when overlapping with struct_mutex and
         * it's the outer lock when overlapping with stolen_lock. */
        struct mutex lock;
-       unsigned long uncompressed_size;
        unsigned threshold;
        unsigned int fb_id;
        unsigned int possible_framebuffer_bits;
@@ -915,21 +915,21 @@ struct i915_fbc {
 
        bool false_color;
 
-       /* Tracks whether the HW is actually enabled, not whether the feature is
-        * possible. */
        bool enabled;
+       bool active;
 
        struct intel_fbc_work {
-               struct delayed_work work;
-               struct intel_crtc *crtc;
+               bool scheduled;
+               struct work_struct work;
                struct drm_framebuffer *fb;
-       } *fbc_work;
+               unsigned long enable_jiffies;
+       } work;
 
        const char *no_fbc_reason;
 
-       bool (*fbc_enabled)(struct drm_i915_private *dev_priv);
-       void (*enable_fbc)(struct intel_crtc *crtc);
-       void (*disable_fbc)(struct drm_i915_private *dev_priv);
+       bool (*is_active)(struct drm_i915_private *dev_priv);
+       void (*activate)(struct intel_crtc *crtc);
+       void (*deactivate)(struct drm_i915_private *dev_priv);
 };
 
 /**
@@ -2456,9 +2456,9 @@ struct drm_i915_cmd_table {
                                 INTEL_DEVID(dev) == 0x0152 || \
                                 INTEL_DEVID(dev) == 0x015a)
 #define IS_VALLEYVIEW(dev)     (INTEL_INFO(dev)->is_valleyview)
-#define IS_CHERRYVIEW(dev)     (INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev))
+#define IS_CHERRYVIEW(dev)     (INTEL_INFO(dev)->is_cherryview)
 #define IS_HASWELL(dev)        (INTEL_INFO(dev)->is_haswell)
-#define IS_BROADWELL(dev)      (!INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev))
+#define IS_BROADWELL(dev)      (!INTEL_INFO(dev)->is_cherryview && IS_GEN8(dev))
 #define IS_SKYLAKE(dev)        (INTEL_INFO(dev)->is_skylake)
 #define IS_BROXTON(dev)                (INTEL_INFO(dev)->is_broxton)
 #define IS_KABYLAKE(dev)       (INTEL_INFO(dev)->is_kabylake)
@@ -2489,6 +2489,14 @@ struct drm_i915_cmd_table {
 #define IS_SKL_ULX(dev)                (INTEL_DEVID(dev) == 0x190E || \
                                 INTEL_DEVID(dev) == 0x1915 || \
                                 INTEL_DEVID(dev) == 0x191E)
+#define IS_KBL_ULT(dev)                (INTEL_DEVID(dev) == 0x5906 || \
+                                INTEL_DEVID(dev) == 0x5913 || \
+                                INTEL_DEVID(dev) == 0x5916 || \
+                                INTEL_DEVID(dev) == 0x5921 || \
+                                INTEL_DEVID(dev) == 0x5926)
+#define IS_KBL_ULX(dev)                (INTEL_DEVID(dev) == 0x590E || \
+                                INTEL_DEVID(dev) == 0x5915 || \
+                                INTEL_DEVID(dev) == 0x591E)
 #define IS_SKL_GT3(dev)                (IS_SKYLAKE(dev) && \
                                 (INTEL_DEVID(dev) & 0x00F0) == 0x0020)
 #define IS_SKL_GT4(dev)                (IS_SKYLAKE(dev) && \
@@ -2585,20 +2593,22 @@ struct drm_i915_cmd_table {
                                 IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
 #define HAS_RUNTIME_PM(dev)    (IS_GEN6(dev) || IS_HASWELL(dev) || \
                                 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
-                                IS_SKYLAKE(dev) || IS_KABYLAKE(dev))
+                                IS_CHERRYVIEW(dev) || IS_SKYLAKE(dev) || \
+                                IS_KABYLAKE(dev))
 #define HAS_RC6(dev)           (INTEL_INFO(dev)->gen >= 6)
 #define HAS_RC6p(dev)          (INTEL_INFO(dev)->gen == 6 || IS_IVYBRIDGE(dev))
 
 #define HAS_CSR(dev)   (IS_GEN9(dev))
 
-#define HAS_GUC_UCODE(dev)     (IS_GEN9(dev))
-#define HAS_GUC_SCHED(dev)     (IS_GEN9(dev))
+#define HAS_GUC_UCODE(dev)     (IS_GEN9(dev) && !IS_KABYLAKE(dev))
+#define HAS_GUC_SCHED(dev)     (IS_GEN9(dev) && !IS_KABYLAKE(dev))
 
 #define HAS_RESOURCE_STREAMER(dev) (IS_HASWELL(dev) || \
                                    INTEL_INFO(dev)->gen >= 8)
 
 #define HAS_CORE_RING_FREQ(dev)        (INTEL_INFO(dev)->gen >= 6 && \
-                                !IS_VALLEYVIEW(dev) && !IS_BROXTON(dev))
+                                !IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) && \
+                                !IS_BROXTON(dev))
 
 #define INTEL_PCH_DEVICE_ID_MASK               0xff00
 #define INTEL_PCH_IBX_DEVICE_ID_TYPE           0x3b00
@@ -2615,12 +2625,14 @@ struct drm_i915_cmd_table {
 #define HAS_PCH_SPT(dev) (INTEL_PCH_TYPE(dev) == PCH_SPT)
 #define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT)
 #define HAS_PCH_LPT_LP(dev) (__I915__(dev)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE)
+#define HAS_PCH_LPT_H(dev) (__I915__(dev)->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE)
 #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
 #define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)
 #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)
 #define HAS_PCH_SPLIT(dev) (INTEL_PCH_TYPE(dev) != PCH_NONE)
 
-#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->gen < 5 || IS_VALLEYVIEW(dev))
+#define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->gen < 5 || \
+                              IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
 
 /* DPF == dynamic parity feature */
 #define HAS_L3_DPF(dev) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
@@ -2860,6 +2872,7 @@ void i915_gem_vma_destroy(struct i915_vma *vma);
 #define PIN_UPDATE     (1<<5)
 #define PIN_ZONE_4G    (1<<6)
 #define PIN_HIGH       (1<<7)
+#define PIN_OFFSET_FIXED       (1<<8)
 #define PIN_OFFSET_MASK (~4095)
 int __must_check
 i915_gem_object_pin(struct drm_i915_gem_object *obj,
@@ -2894,6 +2907,9 @@ static inline int __sg_page_count(struct scatterlist *sg)
        return sg->length >> PAGE_SHIFT;
 }
 
+struct page *
+i915_gem_object_get_dirty_page(struct drm_i915_gem_object *obj, int n);
+
 static inline struct page *
 i915_gem_object_get_page(struct drm_i915_gem_object *obj, int n)
 {
@@ -3205,6 +3221,7 @@ int __must_check i915_gem_evict_something(struct drm_device *dev,
                                          unsigned long start,
                                          unsigned long end,
                                          unsigned flags);
+int __must_check i915_gem_evict_for_vma(struct i915_vma *target);
 int i915_gem_evict_vm(struct i915_address_space *vm, bool do_idle);
 
 /* belongs in i915_gem_gtt.h */
@@ -3511,7 +3528,7 @@ __raw_write(64, q)
 
 static inline i915_reg_t i915_vgacntrl_reg(struct drm_device *dev)
 {
-       if (IS_VALLEYVIEW(dev))
+       if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
                return VLV_VGACNTRL;
        else if (INTEL_INFO(dev)->gen >= 5)
                return CPU_VGACNTRL;