Revert "drm/i915: fix corruptions on i8xx due to relaxed fencing"

[mv-sheeva.git] / drivers / gpu / drm / i915 / i915_gem_tiling.c

diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 79a04fde69b50fd4a0540e93525a8e094e6b2e6d..22a32b9932c59c45761521415fb3d092d562e855 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -184,7 +184,7 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
 static bool
 i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
 {
-       int tile_width, tile_height;
+       int tile_width;
 
        /* Linear is always fine */
        if (tiling_mode == I915_TILING_NONE)
@@ -215,20 +215,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
                }
        }
 
-       if (IS_GEN2(dev) ||
-           (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)))
-               tile_height = 32;
-       else
-               tile_height = 8;
-       /* i8xx is strange: It has 2 interleaved rows of tiles, so needs an even
-        * number of tile rows. */
-       if (IS_GEN2(dev))
-               tile_height *= 2;
-
-       /* Size needs to be aligned to a full tile row */
-       if (size & (tile_height * stride - 1))
-               return false;
-
        /* 965+ just needs multiples of tile width */
        if (INTEL_INFO(dev)->gen >= 4) {
                if (stride & (tile_width - 1))