]> git.karo-electronics.de Git - karo-tx-linux.git/blobdiff - drivers/gpu/drm/i915/intel_ringbuffer.c
Merge remote-tracking branch 'regulator/for-next'
[karo-tx-linux.git] / drivers / gpu / drm / i915 / intel_ringbuffer.c
index 40c6aff57256140a3dccd780356cfcd859f377ba..6f5b511bdb5d9b41eea7011f477e9bbcf663030b 100644 (file)
@@ -789,6 +789,22 @@ static int wa_add(struct drm_i915_private *dev_priv,
 
 #define WA_WRITE(addr, val) WA_REG(addr, 0xffffffff, val)
 
+static int wa_ring_whitelist_reg(struct intel_engine_cs *ring, i915_reg_t reg)
+{
+       struct drm_i915_private *dev_priv = ring->dev->dev_private;
+       struct i915_workarounds *wa = &dev_priv->workarounds;
+       const uint32_t index = wa->hw_whitelist_count[ring->id];
+
+       if (WARN_ON(index >= RING_MAX_NONPRIV_SLOTS))
+               return -EINVAL;
+
+       WA_WRITE(RING_FORCE_TO_NONPRIV(ring->mmio_base, index),
+                i915_mmio_reg_offset(reg));
+       wa->hw_whitelist_count[ring->id]++;
+
+       return 0;
+}
+
 static int gen8_init_workarounds(struct intel_engine_cs *ring)
 {
        struct drm_device *dev = ring->dev;
@@ -894,6 +910,7 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
        struct drm_device *dev = ring->dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
        uint32_t tmp;
+       int ret;
 
        /* WaEnableLbsSlaRetryTimerDecrement:skl */
        I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |
@@ -964,6 +981,20 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
        /* WaDisableSTUnitPowerOptimization:skl,bxt */
        WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);
 
+       /* WaOCLCoherentLineFlush:skl,bxt */
+       I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) |
+                                   GEN8_LQSC_FLUSH_COHERENT_LINES));
+
+       /* WaEnablePreemptionGranularityControlByUMD:skl,bxt */
+       ret= wa_ring_whitelist_reg(ring, GEN8_CS_CHICKEN1);
+       if (ret)
+               return ret;
+
+       /* WaAllowUMDToModifyHDCChicken1:skl,bxt */
+       ret = wa_ring_whitelist_reg(ring, GEN8_HDC_CHICKEN1);
+       if (ret)
+               return ret;
+
        return 0;
 }
 
@@ -1019,6 +1050,16 @@ static int skl_init_workarounds(struct intel_engine_cs *ring)
        if (ret)
                return ret;
 
+       /*
+        * Actual WA is to disable percontext preemption granularity control
+        * until D0 which is the default case so this is equivalent to
+        * !WaDisablePerCtxtPreemptionGranularityControl:skl
+        */
+       if (IS_SKL_REVID(dev, SKL_REVID_E0, REVID_FOREVER)) {
+               I915_WRITE(GEN7_FF_SLICE_CS_CHICKEN1,
+                          _MASKED_BIT_ENABLE(GEN9_FFSC_PERCTX_PREEMPT_CTRL));
+       }
+
        if (IS_SKL_REVID(dev, 0, SKL_REVID_D0)) {
                /* WaDisableChickenBitTSGBarrierAckForFFSliceCS:skl */
                I915_WRITE(FF_SLICE_CS_CHICKEN2,
@@ -1071,6 +1112,11 @@ static int skl_init_workarounds(struct intel_engine_cs *ring)
                        GEN7_HALF_SLICE_CHICKEN1,
                        GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
 
+       /* WaDisableLSQCROPERFforOCL:skl */
+       ret = wa_ring_whitelist_reg(ring, GEN8_L3SQCREG4);
+       if (ret)
+               return ret;
+
        return skl_tune_iz_hashing(ring);
 }
 
@@ -1106,6 +1152,20 @@ static int bxt_init_workarounds(struct intel_engine_cs *ring)
                        GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
        }
 
+       /* WaDisableObjectLevelPreemptionForTrifanOrPolygon:bxt */
+       /* WaDisableObjectLevelPreemptionForInstancedDraw:bxt */
+       /* WaDisableObjectLevelPreemtionForInstanceId:bxt */
+       /* WaDisableLSQCROPERFforOCL:bxt */
+       if (IS_BXT_REVID(dev, 0, BXT_REVID_A1)) {
+               ret = wa_ring_whitelist_reg(ring, GEN9_CS_DEBUG_MODE1);
+               if (ret)
+                       return ret;
+
+               ret = wa_ring_whitelist_reg(ring, GEN8_L3SQCREG4);
+               if (ret)
+                       return ret;
+       }
+
        return 0;
 }
 
@@ -1117,6 +1177,7 @@ int init_workarounds_ring(struct intel_engine_cs *ring)
        WARN_ON(ring->id != RCS);
 
        dev_priv->workarounds.count = 0;
+       dev_priv->workarounds.hw_whitelist_count[RCS] = 0;
 
        if (IS_BROADWELL(dev))
                return bdw_init_workarounds(ring);
@@ -1867,15 +1928,13 @@ i830_dispatch_execbuffer(struct drm_i915_gem_request *req,
                offset = cs_offset;
        }
 
-       ret = intel_ring_begin(req, 4);
+       ret = intel_ring_begin(req, 2);
        if (ret)
                return ret;
 
-       intel_ring_emit(ring, MI_BATCH_BUFFER);
+       intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT);
        intel_ring_emit(ring, offset | (dispatch_flags & I915_DISPATCH_SECURE ?
                                        0 : MI_BATCH_NON_SECURE));
-       intel_ring_emit(ring, offset + len - 8);
-       intel_ring_emit(ring, MI_NOOP);
        intel_ring_advance(ring);
 
        return 0;
@@ -1901,6 +1960,17 @@ i915_dispatch_execbuffer(struct drm_i915_gem_request *req,
        return 0;
 }
 
+static void cleanup_phys_status_page(struct intel_engine_cs *ring)
+{
+       struct drm_i915_private *dev_priv = to_i915(ring->dev);
+
+       if (!dev_priv->status_page_dmah)
+               return;
+
+       drm_pci_free(ring->dev, dev_priv->status_page_dmah);
+       ring->status_page.page_addr = NULL;
+}
+
 static void cleanup_status_page(struct intel_engine_cs *ring)
 {
        struct drm_i915_gem_object *obj;
@@ -1917,9 +1987,9 @@ static void cleanup_status_page(struct intel_engine_cs *ring)
 
 static int init_status_page(struct intel_engine_cs *ring)
 {
-       struct drm_i915_gem_object *obj;
+       struct drm_i915_gem_object *obj = ring->status_page.obj;
 
-       if ((obj = ring->status_page.obj) == NULL) {
+       if (obj == NULL) {
                unsigned flags;
                int ret;
 
@@ -1990,6 +2060,7 @@ void intel_unpin_ringbuffer_obj(struct intel_ringbuffer *ringbuf)
        else
                iounmap(ringbuf->virtual_start);
        ringbuf->virtual_start = NULL;
+       ringbuf->vma = NULL;
        i915_gem_object_ggtt_unpin(ringbuf->obj);
 }
 
@@ -2056,6 +2127,8 @@ int intel_pin_and_map_ringbuffer_obj(struct drm_device *dev,
                }
        }
 
+       ringbuf->vma = i915_gem_obj_to_ggtt(obj);
+
        return 0;
 }
 
@@ -2164,7 +2237,7 @@ static int intel_init_ring_buffer(struct drm_device *dev,
                if (ret)
                        goto error;
        } else {
-               BUG_ON(ring->id != RCS);
+               WARN_ON(ring->id != RCS);
                ret = init_phys_status_page(ring);
                if (ret)
                        goto error;
@@ -2210,7 +2283,12 @@ void intel_cleanup_ring_buffer(struct intel_engine_cs *ring)
        if (ring->cleanup)
                ring->cleanup(ring);
 
-       cleanup_status_page(ring);
+       if (I915_NEED_GFX_HWS(ring->dev)) {
+               cleanup_status_page(ring);
+       } else {
+               WARN_ON(ring->id != RCS);
+               cleanup_phys_status_page(ring);
+       }
 
        i915_cmd_parser_fini_ring(ring);
        i915_gem_batch_pool_fini(&ring->batch_pool);
@@ -2666,6 +2744,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
 
        ring->name = "render ring";
        ring->id = RCS;
+       ring->exec_id = I915_EXEC_RENDER;
        ring->mmio_base = RENDER_RING_BASE;
 
        if (INTEL_INFO(dev)->gen >= 8) {
@@ -2814,6 +2893,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
 
        ring->name = "bsd ring";
        ring->id = VCS;
+       ring->exec_id = I915_EXEC_BSD;
 
        ring->write_tail = ring_write_tail;
        if (INTEL_INFO(dev)->gen >= 6) {
@@ -2890,6 +2970,7 @@ int intel_init_bsd2_ring_buffer(struct drm_device *dev)
 
        ring->name = "bsd2 ring";
        ring->id = VCS2;
+       ring->exec_id = I915_EXEC_BSD;
 
        ring->write_tail = ring_write_tail;
        ring->mmio_base = GEN8_BSD2_RING_BASE;
@@ -2920,6 +3001,7 @@ int intel_init_blt_ring_buffer(struct drm_device *dev)
 
        ring->name = "blitter ring";
        ring->id = BCS;
+       ring->exec_id = I915_EXEC_BLT;
 
        ring->mmio_base = BLT_RING_BASE;
        ring->write_tail = ring_write_tail;
@@ -2977,6 +3059,7 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
 
        ring->name = "video enhancement ring";
        ring->id = VECS;
+       ring->exec_id = I915_EXEC_VEBOX;
 
        ring->mmio_base = VEBOX_RING_BASE;
        ring->write_tail = ring_write_tail;