drm/gf100-/gf: split tpc state into its subunits

[karo-tx-linux.git] / drivers / gpu / drm / nouveau / core / engine / graph / ctxnvf0.c

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
index 0213395cbb71cadc8e02c473a0c2f4968e31f641..9ee6f79596e37929698a8518e5192bd2b96ae903 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
@@ -719,10 +719,7 @@ nvf0_grctx_pack_gpc[] = {
 };
 
 static const struct nvc0_graph_init
-nvf0_grctx_init_tpc_0[] = {
-       { 0x419848,   1, 0x04, 0x00000000 },
-       { 0x419864,   1, 0x04, 0x00000129 },
-       { 0x419888,   1, 0x04, 0x00000000 },
+nvf0_grctx_init_tex_0[] = {
        { 0x419a00,   1, 0x04, 0x000000f0 },
        { 0x419a04,   1, 0x04, 0x00000001 },
        { 0x419a08,   1, 0x04, 0x00000021 },
@@ -733,14 +730,29 @@ nvf0_grctx_init_tpc_0[] = {
        { 0x419a20,   1, 0x04, 0x00020800 },
        { 0x419a30,   1, 0x04, 0x00000001 },
        { 0x419ac4,   1, 0x04, 0x0037f440 },
+       {}
+};
+
+const struct nvc0_graph_init
+nvf0_grctx_init_mpc_0[] = {
        { 0x419c00,   1, 0x04, 0x0000001a },
        { 0x419c04,   1, 0x04, 0x80000006 },
        { 0x419c08,   1, 0x04, 0x00000002 },
        { 0x419c20,   1, 0x04, 0x00000000 },
        { 0x419c24,   1, 0x04, 0x00084210 },
        { 0x419c28,   1, 0x04, 0x3efbefbe },
+       {}
+};
+
+const struct nvc0_graph_init
+nvf0_grctx_init_l1c_0[] = {
        { 0x419ce8,   1, 0x04, 0x00000000 },
        { 0x419cf4,   1, 0x04, 0x00000203 },
+       {}
+};
+
+static const struct nvc0_graph_init
+nvf0_grctx_init_sm_0[] = {
        { 0x419e04,   1, 0x04, 0x00000000 },
        { 0x419e08,   1, 0x04, 0x0000001d },
        { 0x419e0c,   1, 0x04, 0x00000000 },
@@ -769,7 +781,11 @@ nvf0_grctx_init_tpc_0[] = {
 
 static const struct nvc0_graph_pack
 nvf0_grctx_pack_tpc[] = {
-       { nvf0_grctx_init_tpc_0 },
+       { nvd7_grctx_init_pe_0 },
+       { nvf0_grctx_init_tex_0 },
+       { nvf0_grctx_init_mpc_0 },
+       { nvf0_grctx_init_l1c_0 },
+       { nvf0_grctx_init_sm_0 },
        {}
 };