#include "nouveau_drv.h"
#include "nouveau_mm.h"
+#include "nouveau_fifo.h"
#include "nve0_graph.h"
int gpc;
int ret;
- ret = nouveau_gpuobj_new(dev, chan, 0x2000, 256, NVOBJ_FLAG_VM,
+ ret = nouveau_gpuobj_new(dev, chan, 0x3000, 256, NVOBJ_FLAG_VM,
&grch->unk408004);
if (ret)
return ret;
int
nve0_graph_isr_chid(struct drm_device *dev, u64 inst)
{
+ struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_channel *chan;
unsigned long flags;
int i;
spin_lock_irqsave(&dev_priv->channels.lock, flags);
- for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
+ for (i = 0; i < pfifo->channels; i++) {
chan = dev_priv->channels.ptr[i];
if (!chan || !chan->ramin)
continue;
NVOBJ_CLASS(dev, 0xa0c0, GR); /* subc 1: COMPUTE */
NVOBJ_CLASS(dev, 0xa040, GR); /* subc 2: P2MF */
NVOBJ_CLASS(dev, 0x902d, GR); /* subc 3: 2D */
- //NVOBJ_CLASS(dev, 0xa0b5, GR); /* subc 4: COPY */
+ NVOBJ_CLASS(dev, 0xa0b5, GR); /* subc 4: COPY */
return 0;
error: