drm/radeon/kms/pm: rework power management

[karo-tx-linux.git] / drivers / gpu / drm / radeon / radeon.h

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 42217af58145bfe0fe3d2adeda5d8f4f33157d8c..cdcf5eaf671455d4f41aeaf50759657e2388005d 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -175,6 +175,8 @@ void radeon_pm_fini(struct radeon_device *rdev);
 void radeon_pm_compute_clocks(struct radeon_device *rdev);
 void radeon_combios_get_power_modes(struct radeon_device *rdev);
 void radeon_atombios_get_power_modes(struct radeon_device *rdev);
+bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish);
+void radeon_sync_with_vblank(struct radeon_device *rdev);
 
 /*
  * Fences.
@@ -376,6 +378,11 @@ struct radeon_irq {
        wait_queue_head_t       vblank_queue;
        /* FIXME: use defines for max hpd/dacs */
        bool            hpd[6];
+       bool            gui_idle;
+       bool            gui_idle_acked;
+       wait_queue_head_t       idle_queue;
+       /* FIXME: use defines for max HDMI blocks */
+       bool            hdmi[2];
        spinlock_t sw_lock;
        int sw_refcount;
 };
@@ -608,7 +615,8 @@ enum radeon_pm_action {
        PM_ACTION_NONE,
        PM_ACTION_MINIMUM,
        PM_ACTION_DOWNCLOCK,
-       PM_ACTION_UPCLOCK
+       PM_ACTION_UPCLOCK,
+       PM_ACTION_DEFAULT
 };
 
 enum radeon_voltage_type {
@@ -647,13 +655,6 @@ struct radeon_voltage {
        u32 voltage;
 };
 
-struct radeon_pm_non_clock_info {
-       /* pcie lanes */
-       int pcie_lanes;
-       /* standardized non-clock flags */
-       u32 flags;
-};
-
 struct radeon_pm_clock_info {
        /* memory clock */
        u32 mclk;
@@ -665,6 +666,9 @@ struct radeon_pm_clock_info {
        u32 flags;
 };
 
+/* state flags */
+#define RADEON_PM_SINGLE_DISPLAY_ONLY (1 << 0)
+
 struct radeon_power_state {
        enum radeon_pm_state_type type;
        /* XXX: use a define for num clock modes */
@@ -672,9 +676,11 @@ struct radeon_power_state {
        /* number of valid clock modes in this power state */
        int num_clock_modes;
        struct radeon_pm_clock_info *default_clock_mode;
-       /* non clock info about this state */
-       struct radeon_pm_non_clock_info non_clock_info;
-       bool voltage_drop_active;
+       /* standardized state flags */
+       u32 flags;
+       u32 misc; /* vbios specific flags */
+       u32 misc2; /* vbios specific flags */
+       int pcie_lanes; /* pcie lanes */
 };
 
 /*
@@ -688,10 +694,13 @@ struct radeon_pm {
        enum radeon_pm_state    state;
        enum radeon_pm_action   planned_action;
        unsigned long           action_timeout;
-       bool                    downclocked;
-       int                     active_crtcs;
+       bool                    can_upclock;
+       bool                    can_downclock;
+       u32                     active_crtcs;
+       int                     active_crtc_count;
        int                     req_vblank;
        bool                    vblank_sync;
+       bool                    gui_idle;
        fixed20_12              max_bandwidth;
        fixed20_12              igp_sideport_mclk;
        fixed20_12              igp_system_mclk;
@@ -708,11 +717,13 @@ struct radeon_pm {
        struct radeon_power_state power_state[8];
        /* number of valid power states */
        int                     num_power_states;
-       struct radeon_power_state *current_power_state;
-       struct radeon_pm_clock_info *current_clock_mode;
-       struct radeon_power_state *requested_power_state;
-       struct radeon_pm_clock_info *requested_clock_mode;
-       struct radeon_power_state *default_power_state;
+       int                     current_power_state_index;
+       int                     current_clock_mode_index;
+       int                     requested_power_state_index;
+       int                     requested_clock_mode_index;
+       int                     default_power_state_index;
+       u32                     current_sclk;
+       u32                     current_mclk;
        struct radeon_i2c_chan *i2c_bus;
 };
 
@@ -801,6 +812,12 @@ struct radeon_asic {
         * through ring.
         */
        void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
+       bool (*gui_idle)(struct radeon_device *rdev);
+       void (*get_power_state)(struct radeon_device *rdev, enum radeon_pm_action action);
+       void (*set_power_state)(struct radeon_device *rdev, bool static_switch);
+       void (*pm_misc)(struct radeon_device *rdev);
+       void (*pm_prepare)(struct radeon_device *rdev);
+       void (*pm_finish)(struct radeon_device *rdev);
 };
 
 /*
@@ -1207,6 +1224,12 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
 #define radeon_hpd_fini(rdev) (rdev)->asic->hpd_fini((rdev))
 #define radeon_hpd_sense(rdev, hpd) (rdev)->asic->hpd_sense((rdev), (hpd))
 #define radeon_hpd_set_polarity(rdev, hpd) (rdev)->asic->hpd_set_polarity((rdev), (hpd))
+#define radeon_gui_idle(rdev) (rdev)->asic->gui_idle((rdev))
+#define radeon_get_power_state(rdev, a) (rdev)->asic->get_power_state((rdev), (a))
+#define radeon_set_power_state(rdev, s) (rdev)->asic->set_power_state((rdev), (s))
+#define radeon_pm_misc(rdev) (rdev)->asic->pm_misc((rdev))
+#define radeon_pm_prepare(rdev) (rdev)->asic->pm_prepare((rdev))
+#define radeon_pm_finish(rdev) (rdev)->asic->pm_finish((rdev))
 
 /* Common functions */
 /* AGP */
@@ -1332,6 +1355,7 @@ extern int r600_audio_bits_per_sample(struct radeon_device *rdev);
 extern int r600_audio_rate(struct radeon_device *rdev);
 extern uint8_t r600_audio_status_bits(struct radeon_device *rdev);
 extern uint8_t r600_audio_category_code(struct radeon_device *rdev);
+extern void r600_audio_schedule_polling(struct radeon_device *rdev);
 extern void r600_audio_enable_polling(struct drm_encoder *encoder);
 extern void r600_audio_disable_polling(struct drm_encoder *encoder);
 extern void r600_audio_fini(struct radeon_device *rdev);