]> git.karo-electronics.de Git - karo-tx-uboot.git/blobdiff - drivers/i2c/mxc_i2c.c
driver/i2c/mxc: Enable I2C bus 3 and 4
[karo-tx-uboot.git] / drivers / i2c / mxc_i2c.c
index 06ba4e39f1f5ef40f3589e87f75dae3e98fc5481..36edf03b28868c22bc44b2cd879f9d8d7531c8b2 100644 (file)
@@ -22,6 +22,8 @@
 #include <i2c.h>
 #include <watchdog.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef I2C_QUIRK_REG
 struct mxc_i2c_regs {
        uint8_t         iadr;
@@ -102,6 +104,34 @@ static u16 i2c_clk_div[50][2] = {
 };
 #endif
 
+
+#ifndef CONFIG_SYS_MXC_I2C1_SPEED
+#define CONFIG_SYS_MXC_I2C1_SPEED 100000
+#endif
+#ifndef CONFIG_SYS_MXC_I2C2_SPEED
+#define CONFIG_SYS_MXC_I2C2_SPEED 100000
+#endif
+#ifndef CONFIG_SYS_MXC_I2C3_SPEED
+#define CONFIG_SYS_MXC_I2C3_SPEED 100000
+#endif
+#ifndef CONFIG_SYS_MXC_I2C4_SPEED
+#define CONFIG_SYS_MXC_I2C4_SPEED 100000
+#endif
+
+#ifndef CONFIG_SYS_MXC_I2C1_SLAVE
+#define CONFIG_SYS_MXC_I2C1_SLAVE 0
+#endif
+#ifndef CONFIG_SYS_MXC_I2C2_SLAVE
+#define CONFIG_SYS_MXC_I2C2_SLAVE 0
+#endif
+#ifndef CONFIG_SYS_MXC_I2C3_SLAVE
+#define CONFIG_SYS_MXC_I2C3_SLAVE 0
+#endif
+#ifndef CONFIG_SYS_MXC_I2C4_SLAVE
+#define CONFIG_SYS_MXC_I2C4_SLAVE 0
+#endif
+
+
 /*
  * Calculate and set proper clock divider
  */
@@ -111,7 +141,7 @@ static uint8_t i2c_imx_get_clk(unsigned int rate)
        unsigned int div;
        u8 clk_div;
 
-#if defined(CONFIG_MX31)
+#if defined(CONFIG_SOC_MX31)
        struct clock_control_regs *sc_regs =
                (struct clock_control_regs *)CCM_BASE;
 
@@ -144,6 +174,9 @@ static int bus_i2c_set_bus_speed(void *base, int speed)
        u8 clk_idx = i2c_imx_get_clk(speed);
        u8 idx = i2c_clk_div[clk_idx][1];
 
+       if (!base)
+               return -ENODEV;
+
        /* Store divider value */
        writeb(idx, &i2c_regs->ifdr);
 
@@ -153,21 +186,6 @@ static int bus_i2c_set_bus_speed(void *base, int speed)
        return 0;
 }
 
-/*
- * Get I2C Speed
- */
-static unsigned int bus_i2c_get_bus_speed(void *base)
-{
-       struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
-       u8 clk_idx = readb(&i2c_regs->ifdr);
-       u8 clk_div;
-
-       for (clk_div = 0; i2c_clk_div[clk_div][1] != clk_idx; clk_div++)
-               ;
-
-       return mxc_get_clock(MXC_I2C_CLK) / i2c_clk_div[clk_div][0];
-}
-
 #define ST_BUS_IDLE (0 | (I2SR_IBB << 8))
 #define ST_BUS_BUSY (I2SR_IBB | (I2SR_IBB << 8))
 #define ST_IIF (I2SR_IIF | (I2SR_IIF << 8))
@@ -321,6 +339,9 @@ int bus_i2c_read(void *base, uchar chip, uint addr, int alen, uchar *buf,
        int i;
        struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
 
+       if (!base)
+               return -ENODEV;
+
        ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
        if (ret < 0)
                return ret;
@@ -380,6 +401,9 @@ int bus_i2c_write(void *base, uchar chip, uint addr, int alen,
        int i;
        struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)base;
 
+       if (!base)
+               return -ENODEV;
+
        ret = i2c_init_transfer(i2c_regs, chip, addr, alen);
        if (ret < 0)
                return ret;
@@ -393,6 +417,32 @@ int bus_i2c_write(void *base, uchar chip, uint addr, int alen,
        return ret;
 }
 
+static void * const i2c_bases[] = {
+#if defined(CONFIG_SOC_MX25)
+       (void *)IMX_I2C_BASE,
+       (void *)IMX_I2C2_BASE,
+       (void *)IMX_I2C3_BASE
+#elif defined(CONFIG_SOC_MX27)
+       (void *)IMX_I2C1_BASE,
+       (void *)IMX_I2C2_BASE
+#elif defined(CONFIG_SOC_MX31) || defined(CONFIG_SOC_MX35) || \
+       defined(CONFIG_SOC_MX51) || defined(CONFIG_SOC_MX53) || \
+       defined(CONFIG_SOC_MX6) || defined(CONFIG_LS102XA)
+       (void *)I2C1_BASE_ADDR,
+       (void *)I2C2_BASE_ADDR,
+       (void *)I2C3_BASE_ADDR
+#elif defined(CONFIG_SOC_VF610)
+       (void *)I2C0_BASE_ADDR
+#elif defined(CONFIG_FSL_LSCH3)
+       (void *)I2C1_BASE_ADDR,
+       (void *)I2C2_BASE_ADDR,
+       (void *)I2C3_BASE_ADDR,
+       (void *)I2C4_BASE_ADDR
+#else
+#error "architecture not supported"
+#endif
+};
+
 struct i2c_parms {
        void *base;
        void *idle_bus_data;
@@ -401,36 +451,20 @@ struct i2c_parms {
 
 struct sram_data {
        unsigned curr_i2c_bus;
-       struct i2c_parms i2c_data[3];
+       struct i2c_parms i2c_data[ARRAY_SIZE(i2c_bases)];
 };
 
-/*
- * For SPL boot some boards need i2c before SDRAM is initialized so force
- * variables to live in SRAM
- */
-static struct sram_data __attribute__((section(".data"))) srdata;
-
-void *get_base(void)
+void *i2c_get_base(struct i2c_adapter *adap)
 {
-#ifdef CONFIG_SYS_I2C_BASE
-#ifdef CONFIG_I2C_MULTI_BUS
-       void *ret = srdata.i2c_data[srdata.curr_i2c_bus].base;
-       if (ret)
-               return ret;
-#endif
-       return (void *)CONFIG_SYS_I2C_BASE;
-#elif defined(CONFIG_I2C_MULTI_BUS)
-       return srdata.i2c_data[srdata.curr_i2c_bus].base;
-#else
-       return srdata.i2c_data[0].base;
-#endif
+       return i2c_bases[adap->hwadapnr];
 }
 
 static struct i2c_parms *i2c_get_parms(void *base)
 {
+       struct sram_data *srdata = (void *)gd->srdata;
        int i = 0;
-       struct i2c_parms *p = srdata.i2c_data;
-       while (i < ARRAY_SIZE(srdata.i2c_data)) {
+       struct i2c_parms *p = srdata->i2c_data;
+       while (i < ARRAY_SIZE(srdata->i2c_data)) {
                if (p->base == base)
                        return p;
                p++;
@@ -448,46 +482,34 @@ static int i2c_idle_bus(void *base)
        return 0;
 }
 
-#ifdef CONFIG_I2C_MULTI_BUS
-unsigned int i2c_get_bus_num(void)
+static int mxc_i2c_read(struct i2c_adapter *adap, uint8_t chip,
+                               uint addr, int alen, uint8_t *buffer,
+                               int len)
 {
-       return srdata.curr_i2c_bus;
+       return bus_i2c_read(i2c_get_base(adap), chip, addr, alen, buffer, len);
 }
 
-int i2c_set_bus_num(unsigned bus_idx)
+static int mxc_i2c_write(struct i2c_adapter *adap, uint8_t chip,
+                               uint addr, int alen, uint8_t *buffer,
+                               int len)
 {
-       if (bus_idx >= ARRAY_SIZE(srdata.i2c_data))
-               return -1;
-       if (!srdata.i2c_data[bus_idx].base)
-               return -1;
-       srdata.curr_i2c_bus = bus_idx;
-       return 0;
-}
-#endif
-
-int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
-{
-       return bus_i2c_read(get_base(), chip, addr, alen, buf, len);
-}
-
-int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
-{
-       return bus_i2c_write(get_base(), chip, addr, alen, buf, len);
+       return bus_i2c_write(i2c_get_base(adap), chip, addr, alen, buffer, len);
 }
 
 /*
  * Test if a chip at a given address responds (probe the chip)
  */
-int i2c_probe(uchar chip)
+static int mxc_i2c_probe(struct i2c_adapter *adap, uint8_t chip)
 {
-       return bus_i2c_write(get_base(), chip, 0, 0, NULL, 0);
+       return bus_i2c_write(i2c_get_base(adap), chip, 0, 0, NULL, 0);
 }
 
 void bus_i2c_init(void *base, int speed, int unused,
                int (*idle_bus_fn)(void *p), void *idle_bus_data)
 {
+       struct sram_data *srdata = (void *)gd->srdata;
        int i = 0;
-       struct i2c_parms *p = srdata.i2c_data;
+       struct i2c_parms *p = srdata->i2c_data;
        if (!base)
                return;
        for (;;) {
@@ -501,7 +523,7 @@ void bus_i2c_init(void *base, int speed, int unused,
                }
                p++;
                i++;
-               if (i >= ARRAY_SIZE(srdata.i2c_data))
+               if (i >= ARRAY_SIZE(srdata->i2c_data))
                        return;
        }
        bus_i2c_set_bus_speed(base, speed);
@@ -510,23 +532,43 @@ void bus_i2c_init(void *base, int speed, int unused,
 /*
  * Init I2C Bus
  */
-void i2c_init(int speed, int unused)
+static void mxc_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
 {
-       bus_i2c_init(get_base(), speed, unused, NULL, NULL);
+       bus_i2c_init(i2c_get_base(adap), speed, slaveaddr, NULL, NULL);
 }
 
 /*
  * Set I2C Speed
  */
-int i2c_set_bus_speed(unsigned int speed)
+static uint mxc_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed)
 {
-       return bus_i2c_set_bus_speed(get_base(), speed);
+       return bus_i2c_set_bus_speed(i2c_get_base(adap), speed);
 }
 
 /*
- * Get I2C Speed
+ * Register mxc i2c adapters
  */
-unsigned int i2c_get_bus_speed(void)
-{
-       return bus_i2c_get_bus_speed(get_base());
-}
+U_BOOT_I2C_ADAP_COMPLETE(mxc0, mxc_i2c_init, mxc_i2c_probe,
+                        mxc_i2c_read, mxc_i2c_write,
+                        mxc_i2c_set_bus_speed,
+                        CONFIG_SYS_MXC_I2C1_SPEED,
+                        CONFIG_SYS_MXC_I2C1_SLAVE, 0)
+U_BOOT_I2C_ADAP_COMPLETE(mxc1, mxc_i2c_init, mxc_i2c_probe,
+                        mxc_i2c_read, mxc_i2c_write,
+                        mxc_i2c_set_bus_speed,
+                        CONFIG_SYS_MXC_I2C2_SPEED,
+                        CONFIG_SYS_MXC_I2C2_SLAVE, 1)
+#ifdef CONFIG_SYS_I2C_MXC_I2C3
+U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe,
+                        mxc_i2c_read, mxc_i2c_write,
+                        mxc_i2c_set_bus_speed,
+                        CONFIG_SYS_MXC_I2C3_SPEED,
+                        CONFIG_SYS_MXC_I2C3_SLAVE, 2)
+#endif
+#ifdef CONFIG_SYS_I2C_MXC_I2C4
+U_BOOT_I2C_ADAP_COMPLETE(mxc3, mxc_i2c_init, mxc_i2c_probe,
+                        mxc_i2c_read, mxc_i2c_write,
+                        mxc_i2c_set_bus_speed,
+                        CONFIG_SYS_MXC_I2C4_SPEED,
+                        CONFIG_SYS_MXC_I2C4_SLAVE, 3)
+#endif