unsigned int div;
u8 clk_div;
-#if defined(CONFIG_MX31)
+#if defined(CONFIG_SOC_MX31)
struct clock_control_regs *sc_regs =
(struct clock_control_regs *)CCM_BASE;
}
static void * const i2c_bases[] = {
-#if defined(CONFIG_MX25)
+#if defined(CONFIG_SOC_MX25)
(void *)IMX_I2C_BASE,
(void *)IMX_I2C2_BASE,
(void *)IMX_I2C3_BASE
-#elif defined(CONFIG_MX27)
+#elif defined(CONFIG_SOC_MX27)
(void *)IMX_I2C1_BASE,
(void *)IMX_I2C2_BASE
-#elif defined(CONFIG_MX31) || defined(CONFIG_MX35) || \
- defined(CONFIG_MX51) || defined(CONFIG_MX53) || \
- defined(CONFIG_MX6) || defined(CONFIG_LS102XA)
+#elif defined(CONFIG_SOC_MX31) || defined(CONFIG_SOC_MX35) || \
+ defined(CONFIG_SOC_MX51) || defined(CONFIG_SOC_MX53) || \
+ defined(CONFIG_SOC_MX6) || defined(CONFIG_SOC_LS102XA)
(void *)I2C1_BASE_ADDR,
(void *)I2C2_BASE_ADDR,
(void *)I2C3_BASE_ADDR
-#elif defined(CONFIG_VF610)
+#elif defined(CONFIG_SOC_VF610)
(void *)I2C0_BASE_ADDR
#elif defined(CONFIG_FSL_LSCH3)
(void *)I2C1_BASE_ADDR,
mxc_i2c_set_bus_speed,
CONFIG_SYS_MXC_I2C2_SPEED,
CONFIG_SYS_MXC_I2C2_SLAVE, 1)
-#if defined(CONFIG_MX31) || defined(CONFIG_MX35) ||\
- defined(CONFIG_MX51) || defined(CONFIG_MX53) ||\
- defined(CONFIG_MX6) || defined(CONFIG_LS102XA)
+#if defined(CONFIG_SOC_MX31) || defined(CONFIG_SOC_MX35) ||\
+ defined(CONFIG_SOC_MX51) || defined(CONFIG_SOC_MX53) ||\
+ defined(CONFIG_SOC_MX6) || defined(CONFIG_SOC_LS102XA)
U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe,
mxc_i2c_read, mxc_i2c_write,
mxc_i2c_set_bus_speed,