Add GPL-2.0+ SPDX-License-Identifier to source files

[karo-tx-uboot.git] / drivers / i2c / sh_i2c.c

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index a7204cc1d010b4a626fa63ac4309cb5eda8cd35a..58f8bf1bd5186514fee72dff28d64764e36431f6 100644 (file)
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -2,20 +2,7 @@
  * Copyright (C) 2011 Renesas Solutions Corp.
  * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -98,8 +85,8 @@ static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
 {
        u8 icic = SH_IC_TACK;
 
-       writeb(readb(&base->iccr) & ~SH_I2C_ICCR_ICE, &base->iccr);
-       writeb(readb(&base->iccr) | SH_I2C_ICCR_ICE, &base->iccr);
+       clrbits_8(&base->iccr, SH_I2C_ICCR_ICE);
+       setbits_8(&base->iccr, SH_I2C_ICCR_ICE);
 
        writeb(iccl & 0xff, &base->iccl);
        writeb(icch & 0xff, &base->icch);
@@ -114,7 +101,7 @@ static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
        writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), &base->iccr);
        irq_dte(base);
 
-       writeb(readb(&base->icsr) & ~SH_IC_TACK, &base->icsr);
+       clrbits_8(&base->icsr, SH_IC_TACK);
        writeb(id << 1, &base->icdr);
        if (irq_dte_with_tack(base) != 0)
                return -1;
@@ -131,32 +118,40 @@ static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
 static void i2c_finish(struct sh_i2c *base)
 {
        writeb(0, &base->icsr);
-       writeb(readb(&base->iccr) & ~SH_I2C_ICCR_ICE, &base->iccr);
+       clrbits_8(&base->iccr, SH_I2C_ICCR_ICE);
 }
 
-static void i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val)
+static int i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val)
 {
-       i2c_set_addr(base, id, reg, 0);
+       int ret = -1;
+       if (i2c_set_addr(base, id, reg, 0) != 0)
+               goto exit0;
        udelay(10);
 
        writeb(val, &base->icdr);
-       irq_dte(base);
+       if (irq_dte_with_tack(base) != 0)
+               goto exit0;
 
        writeb((SH_I2C_ICCR_ICE | SH_I2C_ICCR_RTS), &base->iccr);
-       irq_dte(base);
+       if (irq_dte_with_tack(base) != 0)
+               goto exit0;
        irq_busy(base);
-
+       ret = 0;
+exit0:
        i2c_finish(base);
+       return ret;
 }
 
-static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
+static int i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
 {
-       u8 ret;
+       int ret = -1;
 
 #if defined(CONFIG_SH73A0)
-       i2c_set_addr(base, id, reg, 0);
+       if (i2c_set_addr(base, id, reg, 0) != 0)
+               goto exit0;
 #else
-       i2c_set_addr(base, id, reg, 1);
+       if (i2c_set_addr(base, id, reg, 1) != 0)
+               goto exit0;
        udelay(100);
 #endif
 
@@ -164,17 +159,19 @@ static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
        irq_dte(base);
 
        writeb(id << 1 | 0x01, &base->icdr);
-       irq_dte(base);
+       if (irq_dte_with_tack(base) != 0)
+               goto exit0;
 
        writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_SCP), &base->iccr);
-       irq_dte(base);
+       if (irq_dte_with_tack(base) != 0)
+               goto exit0;
 
-       ret = readb(&base->icdr);
+       ret = readb(&base->icdr) & 0xff;
 
        writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RACK), &base->iccr);
        readb(&base->icdr); /* Dummy read */
        irq_busy(base);
-
+exit0:
        i2c_finish(base);
 
        return ret;
@@ -286,10 +283,14 @@ void i2c_init(int speed, int slaveaddr)
  */
 int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len)
 {
+       int ret;
        int i = 0;
-       for (i = 0 ; i < len ; i++)
-               buffer[i] = i2c_raw_read(base, chip, addr + i);
-
+       for (i = 0 ; i < len ; i++) {
+               ret = i2c_raw_read(base, chip, addr + i);
+               if (ret < 0)
+                       return -1;
+               buffer[i] = ret & 0xff;
+       }
        return 0;
 }
 
@@ -310,8 +311,8 @@ int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int len)
 {
        int i = 0;
        for (i = 0; i < len ; i++)
-               i2c_raw_write(base, chip, addr + i, buffer[i]);
-
+               if (i2c_raw_write(base, chip, addr + i, buffer[i]) != 0)
+                       return -1;
        return 0;
 }