/*
* Copyright (c) 1999-2001 Vojtech Pavlik
- */
-
-/*
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
#include <linux/kernel.h>
#include <linux/hdreg.h>
-#define XFER_PIO_5 0x0d
-#define XFER_UDMA_SLOW 0x4f
-
-struct ide_timing {
- short mode;
- short setup; /* t1 */
- short act8b; /* t2 for 8-bit io */
- short rec8b; /* t2i for 8-bit io */
- short cyc8b; /* t0 for 8-bit io */
- short active; /* t2 or tD */
- short recover; /* t2i or tK */
- short cycle; /* t0 */
- short udma; /* t2CYCTYP/2 */
-};
-
/*
* PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
* These were taken from ATA/ATAPI-6 standard, rev 0a, except
* for PIO 5, which is a nonstandard extension and UDMA6, which
- * is currently supported only by Maxtor drives.
+ * is currently supported only by Maxtor drives.
*/
static struct ide_timing ide_timing[] = {
{ XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
{ XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
- { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 },
-
{ XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
{ XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
{ XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
-
+
{ XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
{ XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
{ XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
{ XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 },
- { -1 }
+ { 0xff }
};
-#define IDE_TIMING_SETUP 0x01
-#define IDE_TIMING_ACT8B 0x02
-#define IDE_TIMING_REC8B 0x04
-#define IDE_TIMING_CYC8B 0x08
-#define IDE_TIMING_8BIT 0x0e
-#define IDE_TIMING_ACTIVE 0x10
-#define IDE_TIMING_RECOVER 0x20
-#define IDE_TIMING_CYCLE 0x40
-#define IDE_TIMING_UDMA 0x80
-#define IDE_TIMING_ALL 0xff
-
-#define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin)
-#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
-#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
-
-#define XFER_MODE 0xf0
-#define XFER_MWDMA 0x20
-#define XFER_EPIO 0x01
-#define XFER_PIO 0x00
-
-static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q, int T, int UT)
+#define ENOUGH(v, unit) (((v) - 1) / (unit) + 1)
+#define EZ(v, unit) ((v) ? ENOUGH(v, unit) : 0)
+
+static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q,
+ int T, int UT)
{
q->setup = EZ(t->setup * 1000, T);
q->act8b = EZ(t->act8b * 1000, T);
q->udma = EZ(t->udma * 1000, UT);
}
-static void ide_timing_merge(struct ide_timing *a, struct ide_timing *b, struct ide_timing *m, unsigned int what)
+static void ide_timing_merge(struct ide_timing *a, struct ide_timing *b,
+ struct ide_timing *m, unsigned int what)
{
- if (what & IDE_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
- if (what & IDE_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
- if (what & IDE_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
- if (what & IDE_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
- if (what & IDE_TIMING_ACTIVE ) m->active = max(a->active, b->active);
- if (what & IDE_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
- if (what & IDE_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
- if (what & IDE_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
+ if (what & IDE_TIMING_SETUP)
+ m->setup = max(a->setup, b->setup);
+ if (what & IDE_TIMING_ACT8B)
+ m->act8b = max(a->act8b, b->act8b);
+ if (what & IDE_TIMING_REC8B)
+ m->rec8b = max(a->rec8b, b->rec8b);
+ if (what & IDE_TIMING_CYC8B)
+ m->cyc8b = max(a->cyc8b, b->cyc8b);
+ if (what & IDE_TIMING_ACTIVE)
+ m->active = max(a->active, b->active);
+ if (what & IDE_TIMING_RECOVER)
+ m->recover = max(a->recover, b->recover);
+ if (what & IDE_TIMING_CYCLE)
+ m->cycle = max(a->cycle, b->cycle);
+ if (what & IDE_TIMING_UDMA)
+ m->udma = max(a->udma, b->udma);
}
-static struct ide_timing* ide_timing_find_mode(short speed)
+static struct ide_timing *ide_timing_find_mode(u8 speed)
{
struct ide_timing *t;
for (t = ide_timing; t->mode != speed; t++)
- if (t->mode < 0)
+ if (t->mode == 0xff)
return NULL;
- return t;
+ return t;
}
-static int ide_timing_compute(ide_drive_t *drive, short speed, struct ide_timing *t, int T, int UT)
+static int ide_timing_compute(ide_drive_t *drive, u8 speed,
+ struct ide_timing *t, int T, int UT)
{
struct hd_driveid *id = drive->id;
struct ide_timing *s, p;
-/*
- * Find the mode.
- */
-
- if (!(s = ide_timing_find_mode(speed)))
+ /*
+ * Find the mode.
+ */
+ s = ide_timing_find_mode(speed);
+ if (s == NULL)
return -EINVAL;
-/*
- * Copy the timing from the table.
- */
-
+ /*
+ * Copy the timing from the table.
+ */
*t = *s;
-/*
- * If the drive is an EIDE drive, it can tell us it needs extended
- * PIO/MWDMA cycle timing.
- */
-
+ /*
+ * If the drive is an EIDE drive, it can tell us it needs extended
+ * PIO/MWDMA cycle timing.
+ */
if (id && id->field_valid & 2) { /* EIDE drive */
memset(&p, 0, sizeof(p));
- switch (speed & XFER_MODE) {
-
- case XFER_PIO:
- if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = id->eide_pio;
- else p.cycle = p.cyc8b = id->eide_pio_iordy;
- break;
-
- case XFER_MWDMA:
- p.cycle = id->eide_dma_min;
- break;
- }
+ if (speed <= XFER_PIO_2)
+ p.cycle = p.cyc8b = id->eide_pio;
+ else if (speed <= XFER_PIO_5)
+ p.cycle = p.cyc8b = id->eide_pio_iordy;
+ else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
+ p.cycle = id->eide_dma_min;
ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B);
}
-/*
- * Convert the timing to bus clock counts.
- */
-
+ /*
+ * Convert the timing to bus clock counts.
+ */
ide_timing_quantize(t, t, T, UT);
-/*
- * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
- * and some other commands. We have to ensure that the DMA cycle timing is
- * slower/equal than the fastest PIO timing.
- */
-
- if ((speed & XFER_MODE) != XFER_PIO) {
+ /*
+ * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
+ * S.M.A.R.T and some other commands. We have to ensure that the
+ * DMA cycle timing is slower/equal than the fastest PIO timing.
+ */
+ if (speed >= XFER_SW_DMA_0) {
u8 pio = ide_get_best_pio_mode(drive, 255, 5);
ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT);
ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
}
-/*
- * Lengthen active & recovery time so that cycle time is correct.
- */
-
+ /*
+ * Lengthen active & recovery time so that cycle time is correct.
+ */
if (t->act8b + t->rec8b < t->cyc8b) {
t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
t->rec8b = t->cyc8b - t->act8b;
projects / mv-sheeva.git / blobdiff