unsigned long port = (unsigned long)base;
int i;
- hw->io_ports[IDE_DATA_OFFSET] = port;
+ hw->io_ports.data_addr = port;
port += (1 << pdata->ioport_shift);
- for (i = IDE_ERROR_OFFSET; i <= IDE_STATUS_OFFSET;
+ for (i = 1; i <= 7;
i++, port += (1 << pdata->ioport_shift))
- hw->io_ports[i] = port;
+ hw->io_ports_array[i] = port;
- hw->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl;
+ hw->io_ports.ctl_addr = (unsigned long)ctrl;
hw->irq = irq;
hw->chipset = ide_generic;
}
+static const struct ide_port_info platform_ide_port_info = {
+ .host_flags = IDE_HFLAG_NO_DMA,
+};
+
static int __devinit plat_ide_probe(struct platform_device *pdev)
{
struct resource *res_base, *res_alt, *res_irq;
int ret = 0;
int mmio = 0;
hw_regs_t hw;
+ struct ide_port_info d = platform_ide_port_info;
pdata = pdev->dev.platform_data;
res_alt->start, res_alt->end - res_alt->start + 1);
}
- hwif = ide_find_port((unsigned long)base);
+ hwif = ide_find_port();
if (!hwif) {
ret = -ENODEV;
goto out;
ide_init_port_hw(hwif, &hw);
if (mmio) {
- hwif->mmio = 1;
+ d.host_flags |= IDE_HFLAG_MMIO;
default_hwif_mmiops(hwif);
}
idx[0] = hwif->index;
- ide_device_add(idx, NULL);
+ ide_device_add(idx, &d);
platform_set_drvdata(pdev, hwif);
{
ide_hwif_t *hwif = pdev->dev.driver_data;
- ide_unregister(hwif->index);
+ ide_unregister(hwif);
return 0;
}