Merge tag 'sh-for-4.8' of git://git.libc.org/linux-sh

[karo-tx-linux.git] / drivers / misc / cxl / cxl.h

diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index 422ee53868a8830e45b04d484198568aec3caa5e..de090533f18cb8eb5b2c8f0a0b3bfbf6f11e5e00 100644 (file)
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -189,6 +189,18 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An     = {0x0A0};
 #define CXL_PSL_ID_An_F        (1ull << (63-31))
 #define CXL_PSL_ID_An_L        (1ull << (63-30))
 
+/****** CXL_PSL_SERR_An ****************************************************/
+#define CXL_PSL_SERR_An_afuto  (1ull << (63-0))
+#define CXL_PSL_SERR_An_afudis (1ull << (63-1))
+#define CXL_PSL_SERR_An_afuov  (1ull << (63-2))
+#define CXL_PSL_SERR_An_badsrc (1ull << (63-3))
+#define CXL_PSL_SERR_An_badctx (1ull << (63-4))
+#define CXL_PSL_SERR_An_llcmdis        (1ull << (63-5))
+#define CXL_PSL_SERR_An_llcmdto        (1ull << (63-6))
+#define CXL_PSL_SERR_An_afupar (1ull << (63-7))
+#define CXL_PSL_SERR_An_afudup (1ull << (63-8))
+#define CXL_PSL_SERR_An_AE     (1ull << (63-30))
+
 /****** CXL_PSL_SCNTL_An ****************************************************/
 #define CXL_PSL_SCNTL_An_CR          (0x1ull << (63-15))
 /* Programming Modes: */
@@ -428,18 +440,6 @@ struct cxl_afu {
        bool enabled;
 };
 
-/* AFU refcount management */
-static inline struct cxl_afu *cxl_afu_get(struct cxl_afu *afu)
-{
-
-       return (get_device(&afu->dev) == NULL) ? NULL : afu;
-}
-
-static inline void  cxl_afu_put(struct cxl_afu *afu)
-{
-       put_device(&afu->dev);
-}
-
 
 struct cxl_irq_name {
        struct list_head list;
@@ -484,6 +484,9 @@ struct cxl_context {
        /* Only used in PR mode */
        u64 process_token;
 
+       /* driver private data */
+       void *priv;
+
        unsigned long *irq_bitmap; /* Accessed from IRQ context */
        struct cxl_irq_ranges irqs;
        struct list_head irq_names;
@@ -534,6 +537,14 @@ struct cxl_context {
        atomic_t afu_driver_events;
 
        struct rcu_head rcu;
+
+       /*
+        * Only used when more interrupts are allocated via
+        * pci_enable_msix_range than are supported in the default context, to
+        * use additional contexts to overcome the limitation. i.e. Mellanox
+        * CX4 only:
+        */
+       struct list_head extra_irq_contexts;
 };
 
 struct cxl_service_layer_ops {
@@ -549,6 +560,8 @@ struct cxl_service_layer_ops {
        void (*write_timebase_ctrl)(struct cxl *adapter);
        u64 (*timebase_read)(struct cxl *adapter);
        int capi_mode;
+       bool needs_reset_before_disable;
+       int min_pe;
 };
 
 struct cxl_native {
@@ -715,9 +728,21 @@ static inline u64 cxl_p2n_read(struct cxl_afu *afu, cxl_p2n_reg_t reg)
 ssize_t cxl_pci_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
                                loff_t off, size_t count);
 
+/* Internal functions wrapped in cxl_base to allow PHB to call them */
+bool _cxl_pci_associate_default_context(struct pci_dev *dev, struct cxl_afu *afu);
+void _cxl_pci_disable_device(struct pci_dev *dev);
+int _cxl_next_msi_hwirq(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_irq);
+int _cxl_cx4_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);
+void _cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev);
 
 struct cxl_calls {
        void (*cxl_slbia)(struct mm_struct *mm);
+       bool (*cxl_pci_associate_default_context)(struct pci_dev *dev, struct cxl_afu *afu);
+       void (*cxl_pci_disable_device)(struct pci_dev *dev);
+       int (*cxl_next_msi_hwirq)(struct pci_dev *pdev, struct cxl_context **ctx, int *afu_irq);
+       int (*cxl_cx4_setup_msi_irqs)(struct pci_dev *pdev, int nvec, int type);
+       void (*cxl_cx4_teardown_msi_irqs)(struct pci_dev *pdev);
+
        struct module *owner;
 };
 int register_cxl_calls(struct cxl_calls *calls);
@@ -912,4 +937,7 @@ extern const struct cxl_backend_ops *cxl_ops;
 
 /* check if the given pci_dev is on the the cxl vphb bus */
 bool cxl_pci_is_vphb_device(struct pci_dev *dev);
+
+/* decode AFU error bits in the PSL register PSL_SERR_An */
+void cxl_afu_decode_psl_serr(struct cxl_afu *afu, u64 serr);
 #endif