DECLARE_GLOBAL_DATA_PTR;
-struct mmc mmc_dev[MAX_HOSTS];
struct mmc_host mmc_host[MAX_HOSTS];
#ifndef CONFIG_OF_CONTROL
static int mmc_send_cmd_bounced(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data, struct bounce_buffer *bbstate)
{
- struct mmc_host *host = (struct mmc_host *)mmc->priv;
+ struct mmc_host *host = mmc->priv;
int flags, i;
int result;
unsigned int mask = 0;
return 0;
}
-static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
+static int tegra_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
struct mmc_data *data)
{
void *buf;
host->clock = clock;
}
-static void mmc_set_ios(struct mmc *mmc)
+static void tegra_mmc_set_ios(struct mmc *mmc)
{
struct mmc_host *host = mmc->priv;
unsigned char ctrl;
}
/* Set SD bus voltage & enable bus power */
- mmc_set_power(host, fls(mmc->voltages) - 1);
+ mmc_set_power(host, fls(mmc->cfg->voltages) - 1);
debug("%s: power control = %02X, host control = %02X\n", __func__,
readb(&host->reg->pwrcon), readb(&host->reg->hostctl));
pad_init_mmc(host);
}
-static int mmc_core_init(struct mmc *mmc)
+static int tegra_mmc_core_init(struct mmc *mmc)
{
- struct mmc_host *host = (struct mmc_host *)mmc->priv;
+ struct mmc_host *host = mmc->priv;
unsigned int mask;
debug(" mmc_core_init called\n");
int tegra_mmc_getcd(struct mmc *mmc)
{
- struct mmc_host *host = (struct mmc_host *)mmc->priv;
+ struct mmc_host *host = mmc->priv;
debug("tegra_mmc_getcd called\n");
return 1;
}
+static const struct mmc_ops tegra_mmc_ops = {
+ .send_cmd = tegra_mmc_send_cmd,
+ .set_ios = tegra_mmc_set_ios,
+ .init = tegra_mmc_core_init,
+ .getcd = tegra_mmc_getcd,
+};
+
static int do_mmc_init(int dev_index)
{
struct mmc_host *host;
debug(" CD GPIO name = %s\n", host->cd_gpio.name);
}
- mmc = &mmc_dev[dev_index];
+ memset(&host->cfg, 0, sizeof(host->cfg));
- sprintf(mmc->name, "Tegra SD/MMC");
- mmc->priv = host;
- mmc->send_cmd = mmc_send_cmd;
- mmc->set_ios = mmc_set_ios;
- mmc->init = mmc_core_init;
- mmc->getcd = tegra_mmc_getcd;
- mmc->getwp = NULL;
+ host->cfg.name = "Tegra SD/MMC";
+ host->cfg.ops = &tegra_mmc_ops;
- mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
- mmc->host_caps = 0;
+ host->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
+ host->cfg.host_caps = 0;
if (host->width == 8)
- mmc->host_caps |= MMC_MODE_8BIT;
+ host->cfg.host_caps |= MMC_MODE_8BIT;
if (host->width >= 4)
- mmc->host_caps |= MMC_MODE_4BIT;
- mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
+ host->cfg.host_caps |= MMC_MODE_4BIT;
+ host->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC;
/*
* min freq is for card identification, and is the highest
* max freq is highest HS eMMC clock as per the SD/MMC spec
* (actually 52MHz)
*/
- mmc->f_min = 375000;
- mmc->f_max = 48000000;
+ host->cfg.f_min = 375000;
+ host->cfg.f_max = 48000000;
+
+ host->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
- mmc_register(mmc);
+ mmc = mmc_create(&host->cfg, host);
+ if (mmc == NULL)
+ return -1;
return 0;
}
const void *blob = gd->fdt_blob;
debug("%s entry\n", __func__);
+ /* See if any Tegra124 MMC controllers are present */
+ count = fdtdec_find_aliases_for_id(blob, "sdhci",
+ COMPAT_NVIDIA_TEGRA124_SDMMC, node_list, MAX_HOSTS);
+ debug("%s: count of Tegra124 sdhci nodes is %d\n", __func__, count);
+ if (process_nodes(blob, node_list, count)) {
+ printf("%s: Error processing T30 mmc node(s)!\n", __func__);
+ return;
+ }
+
/* See if any Tegra30 MMC controllers are present */
count = fdtdec_find_aliases_for_id(blob, "sdhci",
COMPAT_NVIDIA_TEGRA30_SDMMC, node_list, MAX_HOSTS);