Merge branch 'ufs-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs

[karo-tx-linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_stats.h

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h
index ba5db1dd23a97a7d378ec3ea8e36fa099d0a462a..f81c3aa60b469bef9223fd4313b9d136803ff2b1 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h
@@ -39,7 +39,7 @@
 #define MLX5E_READ_CTR32_CPU(ptr, dsc, i) \
        (*(u32 *)((char *)ptr + dsc[i].offset))
 #define MLX5E_READ_CTR32_BE(ptr, dsc, i) \
-       be64_to_cpu(*(__be32 *)((char *)ptr + dsc[i].offset))
+       be32_to_cpu(*(__be32 *)((char *)ptr + dsc[i].offset))
 
 #define MLX5E_DECLARE_STAT(type, fld) #fld, offsetof(type, fld)
 #define MLX5E_DECLARE_RX_STAT(type, fld) "rx%d_"#fld, offsetof(type, fld)
@@ -201,6 +201,12 @@ static const struct counter_desc vport_stats_desc[] = {
 #define PPORT_2819_GET(pstats, c) \
        MLX5_GET64(ppcnt_reg, pstats->RFC_2819_counters, \
                   counter_set.eth_2819_cntrs_grp_data_layout.c##_high)
+#define PPORT_PHY_STATISTICAL_OFF(c) \
+       MLX5_BYTE_OFF(ppcnt_reg, \
+                     counter_set.phys_layer_statistical_cntrs.c##_high)
+#define PPORT_PHY_STATISTICAL_GET(pstats, c) \
+       MLX5_GET64(ppcnt_reg, (pstats)->phy_statistical_counters, \
+                  counter_set.phys_layer_statistical_cntrs.c##_high)
 #define PPORT_PER_PRIO_OFF(c) \
        MLX5_BYTE_OFF(ppcnt_reg, \
                      counter_set.eth_per_prio_grp_data_layout.c##_high)
@@ -215,6 +221,7 @@ struct mlx5e_pport_stats {
        __be64 RFC_2819_counters[MLX5_ST_SZ_QW(ppcnt_reg)];
        __be64 per_prio_counters[NUM_PPORT_PRIO][MLX5_ST_SZ_QW(ppcnt_reg)];
        __be64 phy_counters[MLX5_ST_SZ_QW(ppcnt_reg)];
+       __be64 phy_statistical_counters[MLX5_ST_SZ_QW(ppcnt_reg)];
 };
 
 static const struct counter_desc pport_802_3_stats_desc[] = {
@@ -260,6 +267,11 @@ static const struct counter_desc pport_2819_stats_desc[] = {
        { "rx_8192_to_10239_bytes_phy", PPORT_2819_OFF(ether_stats_pkts8192to10239octets) },
 };
 
+static const struct counter_desc pport_phy_statistical_stats_desc[] = {
+       { "rx_symbol_errors_phy", PPORT_PHY_STATISTICAL_OFF(phy_symbol_errors) },
+       { "rx_corrected_bits_phy", PPORT_PHY_STATISTICAL_OFF(phy_corrected_bits) },
+};
+
 static const struct counter_desc pport_per_prio_traffic_stats_desc[] = {
        { "rx_prio%d_bytes", PPORT_PER_PRIO_OFF(rx_octets) },
        { "rx_prio%d_packets", PPORT_PER_PRIO_OFF(rx_frames) },
@@ -276,6 +288,21 @@ static const struct counter_desc pport_per_prio_pfc_stats_desc[] = {
        { "rx_%s_pause_transition", PPORT_PER_PRIO_OFF(rx_pause_transition) },
 };
 
+#define PCIE_PERF_OFF(c) \
+       MLX5_BYTE_OFF(mpcnt_reg, counter_set.pcie_perf_cntrs_grp_data_layout.c)
+#define PCIE_PERF_GET(pcie_stats, c) \
+       MLX5_GET(mpcnt_reg, (pcie_stats)->pcie_perf_counters, \
+                counter_set.pcie_perf_cntrs_grp_data_layout.c)
+
+struct mlx5e_pcie_stats {
+       __be64 pcie_perf_counters[MLX5_ST_SZ_QW(mpcnt_reg)];
+};
+
+static const struct counter_desc pcie_perf_stats_desc[] = {
+       { "rx_pci_signal_integrity", PCIE_PERF_OFF(rx_errors) },
+       { "tx_pci_signal_integrity", PCIE_PERF_OFF(tx_errors) },
+};
+
 struct mlx5e_rq_stats {
        u64 packets;
        u64 bytes;
@@ -360,15 +387,23 @@ static const struct counter_desc sq_stats_desc[] = {
 #define NUM_PPORT_802_3_COUNTERS       ARRAY_SIZE(pport_802_3_stats_desc)
 #define NUM_PPORT_2863_COUNTERS                ARRAY_SIZE(pport_2863_stats_desc)
 #define NUM_PPORT_2819_COUNTERS                ARRAY_SIZE(pport_2819_stats_desc)
+#define NUM_PPORT_PHY_STATISTICAL_COUNTERS(priv) \
+       (ARRAY_SIZE(pport_phy_statistical_stats_desc) * \
+        MLX5_CAP_PCAM_FEATURE((priv)->mdev, ppcnt_statistical_group))
+#define NUM_PCIE_PERF_COUNTERS(priv) \
+       (ARRAY_SIZE(pcie_perf_stats_desc) * \
+        MLX5_CAP_MCAM_FEATURE((priv)->mdev, pcie_performance_group))
 #define NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS \
        ARRAY_SIZE(pport_per_prio_traffic_stats_desc)
 #define NUM_PPORT_PER_PRIO_PFC_COUNTERS \
        ARRAY_SIZE(pport_per_prio_pfc_stats_desc)
-#define NUM_PPORT_COUNTERS             (NUM_PPORT_802_3_COUNTERS + \
+#define NUM_PPORT_COUNTERS(priv)       (NUM_PPORT_802_3_COUNTERS + \
                                         NUM_PPORT_2863_COUNTERS  + \
                                         NUM_PPORT_2819_COUNTERS  + \
+                                        NUM_PPORT_PHY_STATISTICAL_COUNTERS(priv) + \
                                         NUM_PPORT_PER_PRIO_TRAFFIC_COUNTERS * \
                                         NUM_PPORT_PRIO)
+#define NUM_PCIE_COUNTERS(priv)                NUM_PCIE_PERF_COUNTERS(priv)
 #define NUM_RQ_STATS                   ARRAY_SIZE(rq_stats_desc)
 #define NUM_SQ_STATS                   ARRAY_SIZE(sq_stats_desc)
 
@@ -378,23 +413,17 @@ struct mlx5e_stats {
        struct mlx5e_vport_stats vport;
        struct mlx5e_pport_stats pport;
        struct rtnl_link_stats64 vf_vport;
+       struct mlx5e_pcie_stats pcie;
 };
 
 static const struct counter_desc mlx5e_pme_status_desc[] = {
-       { "module_plug", 0 },
        { "module_unplug", 8 },
 };
 
 static const struct counter_desc mlx5e_pme_error_desc[] = {
-       { "module_pwr_budget_exd", 0 },  /* power budget exceed */
-       { "module_long_range", 8 },      /* long range for non MLNX cable */
-       { "module_bus_stuck", 16 },      /* bus stuck (I2C or data shorted) */
-       { "module_no_eeprom", 24 },      /* no eeprom/retry time out */
-       { "module_enforce_part", 32 },   /* enforce part number list */
-       { "module_unknown_id", 40 },     /* unknown identifier */
-       { "module_high_temp", 48 },      /* high temperature */
+       { "module_bus_stuck", 16 },       /* bus stuck (I2C or data shorted) */
+       { "module_high_temp", 48 },       /* high temperature */
        { "module_bad_shorted", 56 },    /* bad or shorted cable/module */
-       { "module_unknown_status", 64 },
 };
 
 #endif /* __MLX5_EN_STATS_H__ */