]> git.karo-electronics.de Git - karo-tx-linux.git/blobdiff - drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c
qed*: Utilize Firmware 8.15.3.0
[karo-tx-linux.git] / drivers / net / ethernet / qlogic / qed / qed_init_fw_funcs.c
index d891a68526950609f9efbe75ecacfb40ce49b97a..2a50e2b7568f5aff16f3d6afa70c630a6166201a 100644 (file)
@@ -215,13 +215,6 @@ static void qed_cmdq_lines_voq_rt_init(struct qed_hwfn *p_hwfn,
 {
        u32 qm_line_crd;
 
-       /* In A0 - Limit the size of pbf queue so that only 511 commands with
-        * the minimum size of 4 (FCoE minimum size)
-        */
-       bool is_bb_a0 = QED_IS_BB_A0(p_hwfn->cdev);
-
-       if (is_bb_a0)
-               cmdq_lines = min_t(u32, cmdq_lines, 1022);
        qm_line_crd = QM_VOQ_LINE_CRD(cmdq_lines);
        OVERWRITE_RT_REG(p_hwfn, PBF_CMDQ_LINES_RT_OFFSET(voq),
                         (u32)cmdq_lines);
@@ -343,13 +336,11 @@ static void qed_tx_pq_map_rt_init(
        u16 first_pq_group = p_params->start_pq / QM_PF_QUEUE_GROUP_SIZE;
        u16 last_pq_group = (p_params->start_pq + num_pqs - 1) /
                            QM_PF_QUEUE_GROUP_SIZE;
-       bool is_bb_a0 = QED_IS_BB_A0(p_hwfn->cdev);
        u16 i, pq_id, pq_group;
 
        /* a bit per Tx PQ indicating if the PQ is associated with a VF */
        u32 tx_pq_vf_mask[MAX_QM_TX_QUEUES / QM_PF_QUEUE_GROUP_SIZE] = { 0 };
-       u32 tx_pq_vf_mask_width = is_bb_a0 ? 32 : QM_PF_QUEUE_GROUP_SIZE;
-       u32 num_tx_pq_vf_masks = MAX_QM_TX_QUEUES / tx_pq_vf_mask_width;
+       u32 num_tx_pq_vf_masks = MAX_QM_TX_QUEUES / QM_PF_QUEUE_GROUP_SIZE;
        u32 pq_mem_4kb = QM_PQ_MEM_4KB(p_params->num_pf_cids);
        u32 vport_pq_mem_4kb = QM_PQ_MEM_4KB(p_params->num_vf_cids);
        u32 mem_addr_4kb = base_mem_addr_4kb;
@@ -371,6 +362,10 @@ static void qed_tx_pq_map_rt_init(
                bool is_vf_pq = (i >= p_params->num_pf_pqs);
                struct qm_rf_pq_map tx_pq_map;
 
+               bool rl_valid = p_params->pq_params[i].rl_valid &&
+                               (p_params->pq_params[i].vport_id <
+                                MAX_QM_GLOBAL_RLS);
+
                /* update first Tx PQ of VPORT/TC */
                u8 vport_id_in_pf = p_params->pq_params[i].vport_id -
                                    p_params->start_vport;
@@ -389,14 +384,18 @@ static void qed_tx_pq_map_rt_init(
                                     (p_params->pf_id <<
                                      QM_WFQ_VP_PQ_PF_SHIFT));
                }
+
+               if (p_params->pq_params[i].rl_valid && !rl_valid)
+                       DP_NOTICE(p_hwfn,
+                                 "Invalid VPORT ID for rate limiter configuration");
                /* fill PQ map entry */
                memset(&tx_pq_map, 0, sizeof(tx_pq_map));
                SET_FIELD(tx_pq_map.reg, QM_RF_PQ_MAP_PQ_VALID, 1);
-               SET_FIELD(tx_pq_map.reg, QM_RF_PQ_MAP_RL_VALID,
-                         p_params->pq_params[i].rl_valid ? 1 : 0);
+               SET_FIELD(tx_pq_map.reg,
+                         QM_RF_PQ_MAP_RL_VALID, rl_valid ? 1 : 0);
                SET_FIELD(tx_pq_map.reg, QM_RF_PQ_MAP_VP_PQ_ID, first_tx_pq_id);
                SET_FIELD(tx_pq_map.reg, QM_RF_PQ_MAP_RL_ID,
-                         p_params->pq_params[i].rl_valid ?
+                         rl_valid ?
                          p_params->pq_params[i].vport_id : 0);
                SET_FIELD(tx_pq_map.reg, QM_RF_PQ_MAP_VOQ, voq);
                SET_FIELD(tx_pq_map.reg, QM_RF_PQ_MAP_WRR_WEIGHT_GROUP,
@@ -413,8 +412,9 @@ static void qed_tx_pq_map_rt_init(
                        /* if PQ is associated with a VF, add indication
                         * to PQ VF mask
                         */
-                       tx_pq_vf_mask[pq_id / tx_pq_vf_mask_width] |=
-                               (1 << (pq_id % tx_pq_vf_mask_width));
+                       tx_pq_vf_mask[pq_id /
+                                     QM_PF_QUEUE_GROUP_SIZE] |=
+                           BIT((pq_id % QM_PF_QUEUE_GROUP_SIZE));
                        mem_addr_4kb += vport_pq_mem_4kb;
                } else {
                        mem_addr_4kb += pq_mem_4kb;
@@ -480,8 +480,8 @@ static int qed_pf_wfq_rt_init(struct qed_hwfn *p_hwfn,
        if (p_params->pf_id < MAX_NUM_PFS_BB)
                crd_reg_offset = QM_REG_WFQPFCRD_RT_OFFSET;
        else
-               crd_reg_offset = QM_REG_WFQPFCRD_MSB_RT_OFFSET +
-                                (p_params->pf_id % MAX_NUM_PFS_BB);
+               crd_reg_offset = QM_REG_WFQPFCRD_MSB_RT_OFFSET;
+       crd_reg_offset += p_params->pf_id % MAX_NUM_PFS_BB;
 
        inc_val = QM_WFQ_INC_VAL(p_params->pf_wfq);
        if (!inc_val || inc_val > QM_WFQ_MAX_INC_VAL) {
@@ -498,11 +498,11 @@ static int qed_pf_wfq_rt_init(struct qed_hwfn *p_hwfn,
                                 QM_WFQ_CRD_REG_SIGN_BIT);
        }
 
-       STORE_RT_REG(p_hwfn, QM_REG_WFQPFWEIGHT_RT_OFFSET + p_params->pf_id,
-                    inc_val);
        STORE_RT_REG(p_hwfn,
                     QM_REG_WFQPFUPPERBOUND_RT_OFFSET + p_params->pf_id,
                     QM_WFQ_UPPER_BOUND | QM_WFQ_CRD_REG_SIGN_BIT);
+       STORE_RT_REG(p_hwfn, QM_REG_WFQPFWEIGHT_RT_OFFSET + p_params->pf_id,
+                    inc_val);
        return 0;
 }
 
@@ -576,6 +576,12 @@ static int qed_vport_rl_rt_init(struct qed_hwfn *p_hwfn,
 {
        u8 i, vport_id;
 
+       if (start_vport + num_vports >= MAX_QM_GLOBAL_RLS) {
+               DP_NOTICE(p_hwfn,
+                         "Invalid VPORT ID for rate limiter configuration");
+               return -1;
+       }
+
        /* go over all PF VPORTs */
        for (i = 0, vport_id = start_vport; i < num_vports; i++, vport_id++) {
                u32 inc_val = QM_RL_INC_VAL(vport_params[i].vport_rl);
@@ -785,6 +791,12 @@ int qed_init_vport_rl(struct qed_hwfn *p_hwfn,
 {
        u32 inc_val = QM_RL_INC_VAL(vport_rl);
 
+       if (vport_id >= MAX_QM_GLOBAL_RLS) {
+               DP_NOTICE(p_hwfn,
+                         "Invalid VPORT ID for rate limiter configuration");
+               return -1;
+       }
+
        if (inc_val > QM_RL_MAX_INC_VAL) {
                DP_NOTICE(p_hwfn, "Invalid VPORT rate-limit configuration");
                return -1;
@@ -940,12 +952,6 @@ void qed_set_geneve_enable(struct qed_hwfn *p_hwfn,
               eth_geneve_enable ? 1 : 0);
        qed_wr(p_hwfn, p_ptt, NIG_REG_NGE_IP_ENABLE, ip_geneve_enable ? 1 : 0);
 
-       /* comp ver */
-       reg_val = (ip_geneve_enable || eth_geneve_enable) ? 1 : 0;
-       qed_wr(p_hwfn, p_ptt, NIG_REG_NGE_COMP_VER, reg_val);
-       qed_wr(p_hwfn, p_ptt, PBF_REG_NGE_COMP_VER, reg_val);
-       qed_wr(p_hwfn, p_ptt, PRS_REG_NGE_COMP_VER, reg_val);
-
        /* EDPM with geneve tunnel not supported in BB_B0 */
        if (QED_IS_BB_B0(p_hwfn->cdev))
                return;