#define RPC_LSA_DEFAULT RPC_LED_100_10
#define RPC_LSB_DEFAULT RPC_LED_TX_RX
-# if defined (CONFIG_BFIN561_EZKIT)
#define SMC_CAN_USE_8BIT 0
#define SMC_CAN_USE_16BIT 1
+# if defined(CONFIG_BF561)
#define SMC_CAN_USE_32BIT 1
-#define SMC_IO_SHIFT 0
-#define SMC_NOWAIT 1
-#define SMC_USE_BFIN_DMA 0
-
-
-#define SMC_inw(a, r) readw((a) + (r))
-#define SMC_outw(v, a, r) writew(v, (a) + (r))
-#define SMC_inl(a, r) readl((a) + (r))
-#define SMC_outl(v, a, r) writel(v, (a) + (r))
-#define SMC_outsl(a, r, p, l) outsl((unsigned long *)((a) + (r)), p, l)
-#define SMC_insl(a, r, p, l) insl ((unsigned long *)((a) + (r)), p, l)
# else
-#define SMC_CAN_USE_8BIT 0
-#define SMC_CAN_USE_16BIT 1
#define SMC_CAN_USE_32BIT 0
+# endif
#define SMC_IO_SHIFT 0
#define SMC_NOWAIT 1
#define SMC_USE_BFIN_DMA 0
-
-#define SMC_inw(a, r) readw((a) + (r))
-#define SMC_outw(v, a, r) writew(v, (a) + (r))
-#define SMC_outsw(a, r, p, l) outsw((unsigned long *)((a) + (r)), p, l)
-#define SMC_insw(a, r, p, l) insw ((unsigned long *)((a) + (r)), p, l)
+#define SMC_inw(a, r) readw((a) + (r))
+#define SMC_outw(v, a, r) writew(v, (a) + (r))
+#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
+#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
+# if SMC_CAN_USE_32BIT
+#define SMC_inl(a, r) readl((a) + (r))
+#define SMC_outl(v, a, r) writel(v, (a) + (r))
+#define SMC_insl(a, r, p, l) readsl((a) + (r), p, l)
+#define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l)
# endif
-/* check if the mac in reg is valid */
-#define SMC_GET_MAC_ADDR(lp, addr) \
- do { \
- unsigned int __v; \
- __v = SMC_inw(ioaddr, ADDR0_REG(lp)); \
- addr[0] = __v; addr[1] = __v >> 8; \
- __v = SMC_inw(ioaddr, ADDR1_REG(lp)); \
- addr[2] = __v; addr[3] = __v >> 8; \
- __v = SMC_inw(ioaddr, ADDR2_REG(lp)); \
- addr[4] = __v; addr[5] = __v >> 8; \
- if (*(u32 *)(&addr[0]) == 0xFFFFFFFF) { \
- random_ether_addr(addr); \
- } \
- } while (0)
+
#elif defined(CONFIG_REDWOOD_5) || defined(CONFIG_REDWOOD_6)
/* We can only do 16-bit reads and writes in the static memory space. */
#define SMC_IRQ_FLAGS (0)
-#elif defined(CONFIG_ISA)
-
-#define SMC_CAN_USE_8BIT 1
-#define SMC_CAN_USE_16BIT 1
-#define SMC_CAN_USE_32BIT 0
-
-#define SMC_inb(a, r) inb((a) + (r))
-#define SMC_inw(a, r) inw((a) + (r))
-#define SMC_outb(v, a, r) outb(v, (a) + (r))
-#define SMC_outw(v, a, r) outw(v, (a) + (r))
-#define SMC_insw(a, r, p, l) insw((a) + (r), p, l)
-#define SMC_outsw(a, r, p, l) outsw((a) + (r), p, l)
-
#elif defined(CONFIG_M32R)
#define SMC_CAN_USE_8BIT 0
#define SMC_GET_MII(lp) SMC_inw(ioaddr, MII_REG(lp))
+#define SMC_GET_GP(lp) SMC_inw(ioaddr, GP_REG(lp))
+
+#define SMC_SET_GP(lp, x) \
+ do { \
+ if (SMC_MUST_ALIGN_WRITE(lp)) \
+ SMC_outl((x)<<16, ioaddr, SMC_REG(lp, 8, 1)); \
+ else \
+ SMC_outw(x, ioaddr, GP_REG(lp)); \
+ } while (0)
+
#define SMC_SET_MII(lp, x) SMC_outw(x, ioaddr, MII_REG(lp))
#define SMC_GET_MIR(lp) SMC_inw(ioaddr, MIR_REG(lp))