]> git.karo-electronics.de Git - karo-tx-linux.git/blobdiff - drivers/net/tg3.h
p54pci: update receive dma buffers before and after processing
[karo-tx-linux.git] / drivers / net / tg3.h
index 4a1974804b9fcd0c6531c86f899c03834d0061db..d62c8d937c820cf3a124a2250a351156b49a84c6 100644 (file)
 /* 0x3664 --> 0x36b0 unused */
 
 #define TG3_CPMU_EEE_MODE              0x000036b0
-#define TG3_CPMU_EEEMD_ERLY_L1_XIT_DET  0x00000008
-#define TG3_CPMU_EEEMD_LPI_ENABLE       0x00000080
-#define TG3_CPMU_EEEMD_LPI_IN_TX        0x00000100
-#define TG3_CPMU_EEEMD_LPI_IN_RX        0x00000200
-#define TG3_CPMU_EEEMD_EEE_ENABLE       0x00100000
-/* 0x36b4 --> 0x36b8 unused */
-
+#define  TG3_CPMU_EEEMD_APE_TX_DET_EN   0x00000004
+#define  TG3_CPMU_EEEMD_ERLY_L1_XIT_DET         0x00000008
+#define  TG3_CPMU_EEEMD_SND_IDX_DET_EN  0x00000040
+#define  TG3_CPMU_EEEMD_LPI_ENABLE      0x00000080
+#define  TG3_CPMU_EEEMD_LPI_IN_TX       0x00000100
+#define  TG3_CPMU_EEEMD_LPI_IN_RX       0x00000200
+#define  TG3_CPMU_EEEMD_EEE_ENABLE      0x00100000
+#define TG3_CPMU_EEE_DBTMR1            0x000036b4
+#define  TG3_CPMU_DBTMR1_PCIEXIT_2047US         0x07ff0000
+#define  TG3_CPMU_DBTMR1_LNKIDLE_2047US         0x000070ff
+#define TG3_CPMU_EEE_DBTMR2            0x000036b8
+#define  TG3_CPMU_DBTMR1_APE_TX_2047US  0x07ff0000
+#define  TG3_CPMU_DBTMR2_TXIDXEQ_2047US         0x000070ff
 #define TG3_CPMU_EEE_LNKIDL_CTRL       0x000036bc
 #define  TG3_CPMU_EEE_LNKIDL_PCIE_NL0   0x01000000
 #define  TG3_CPMU_EEE_LNKIDL_UART_IDL   0x00000004
 
 #define TG3_RDMA_RSRVCTRL_REG          0x00004900
 #define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX         0x00000004
+#define TG3_RDMA_RSRVCTRL_TXMRGN_320B   0x28000000
+#define TG3_RDMA_RSRVCTRL_TXMRGN_MASK   0xffe00000
 /* 0x4904 --> 0x4910 unused */
 
 #define TG3_LSO_RD_DMA_CRPTEN_CTRL     0x00004910
 #define MII_TG3_TEST1_CRC_EN           0x8000
 
 /* Clause 45 expansion registers */
-#define TG3_CL45_D7_EEEADV_CAP         0x003c
-#define TG3_CL45_D7_EEEADV_CAP_100TX   0x0002
-#define TG3_CL45_D7_EEEADV_CAP_1000T   0x0004
 #define TG3_CL45_D7_EEERES_STAT                0x803e
 #define TG3_CL45_D7_EEERES_STAT_LP_100TX       0x0002
 #define TG3_CL45_D7_EEERES_STAT_LP_1000T       0x0004
@@ -2562,10 +2567,6 @@ struct ring_info {
        DEFINE_DMA_UNMAP_ADDR(mapping);
 };
 
-struct tg3_config_info {
-       u32                             flags;
-};
-
 struct tg3_link_config {
        /* Describes what we're trying to get. */
        u32                             advertising;
@@ -2713,17 +2714,17 @@ struct tg3_napi {
        u32                             last_irq_tag;
        u32                             int_mbox;
        u32                             coal_now;
-       u32                             tx_prod;
-       u32                             tx_cons;
-       u32                             tx_pending;
-       u32                             prodmbox;
 
-       u32                             consmbox;
+       u32                             consmbox ____cacheline_aligned;
        u32                             rx_rcb_ptr;
        u16                             *rx_rcb_prod_idx;
        struct tg3_rx_prodring_set      prodring;
-
        struct tg3_rx_buffer_desc       *rx_rcb;
+
+       u32                             tx_prod ____cacheline_aligned;
+       u32                             tx_cons;
+       u32                             tx_pending;
+       u32                             prodmbox;
        struct tg3_tx_buffer_desc       *tx_ring;
        struct ring_info                *tx_buffers;
 
@@ -2946,6 +2947,7 @@ struct tg3 {
        int                             pcix_cap;
        int                             pcie_cap;
        };
+       int                             pcie_readrq;
 
        struct mii_bus                  *mdio_bus;
        int                             mdio_irq[PHY_MAX_ADDR];