#include "iwl-trans-int-pcie.h"
/*TODO remove uneeded includes when the transport layer tx_free will be here */
#include "iwl-agn.h"
-#include "iwl-core.h"
#include "iwl-shared.h"
static int iwl_trans_rx_alloc(struct iwl_trans *trans)
struct iwl_tx_queue *txq, int slots_num,
u32 txq_id)
{
- size_t tfd_sz = hw_params(trans).tfd_size * TFD_QUEUE_SIZE_MAX;
+ size_t tfd_sz = sizeof(struct iwl_tfd) * TFD_QUEUE_SIZE_MAX;
int i;
if (WARN_ON(txq->meta || txq->cmd || txq->txb || txq->tfds))
/* De-alloc circular buffer of TFDs */
if (txq->q.n_bd) {
- dma_free_coherent(dev, hw_params(trans).tfd_size *
+ dma_free_coherent(dev, sizeof(struct iwl_tfd) *
txq->q.n_bd, txq->tfds, txq->q.dma_addr);
memset(&txq->q.dma_addr, 0, sizeof(txq->q.dma_addr));
}
kfree(priv->txq);
priv->txq = NULL;
- iwlagn_free_dma_ptr(trans, &priv->kw);
+ iwlagn_free_dma_ptr(trans, &trans_pcie->kw);
iwlagn_free_dma_ptr(trans, &trans_pcie->scd_bc_tbls);
}
struct iwl_trans_pcie *trans_pcie =
IWL_TRANS_GET_PCIE_TRANS(trans);
+ u16 scd_bc_tbls_size = priv->cfg->base_params->num_of_queues *
+ sizeof(struct iwlagn_scd_bc_tbl);
+
/*It is not allowed to alloc twice, so warn when this happens.
* We cannot rely on the previous allocation, so free and fail */
if (WARN_ON(priv->txq)) {
}
ret = iwlagn_alloc_dma_ptr(trans, &trans_pcie->scd_bc_tbls,
- hw_params(trans).scd_bc_tbls_size);
+ scd_bc_tbls_size);
if (ret) {
IWL_ERR(trans, "Scheduler BC Table allocation failed\n");
goto error;
}
/* Alloc keep-warm buffer */
- ret = iwlagn_alloc_dma_ptr(trans, &priv->kw, IWL_KW_SIZE);
+ ret = iwlagn_alloc_dma_ptr(trans, &trans_pcie->kw, IWL_KW_SIZE);
if (ret) {
IWL_ERR(trans, "Keep Warm allocation failed\n");
goto error;
unsigned long flags;
bool alloc = false;
struct iwl_priv *priv = priv(trans);
+ struct iwl_trans_pcie *trans_pcie =
+ IWL_TRANS_GET_PCIE_TRANS(trans);
if (!priv->txq) {
ret = iwl_trans_tx_alloc(trans);
iwl_write_prph(priv, SCD_TXFACT, 0);
/* Tell NIC where to find the "keep warm" buffer */
- iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4);
+ iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, trans_pcie->kw.dma >> 4);
spin_unlock_irqrestore(&trans->shrd->lock, flags);
int pos = 0;
ssize_t ret = -ENOMEM;
- ret = pos = iwl_dump_nic_event_log(priv(trans), true, &buf, true);
+ ret = pos = iwl_dump_nic_event_log(trans, true, &buf, true);
if (buf) {
ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
kfree(buf);
if (sscanf(buf, "%d", &event_log_flag) != 1)
return -EFAULT;
if (event_log_flag == 1)
- iwl_dump_nic_event_log(priv(trans), true, NULL, false);
+ iwl_dump_nic_event_log(trans, true, NULL, false);
return count;
}