#include <common.h>
-#ifdef CONFIG_PCI
-
#include <command.h>
#include <asm/processor.h>
#include <asm/io.h>
PCI_WRITE_VIA_DWORD_OP(byte, u8, 0x03, 0x000000ff)
PCI_WRITE_VIA_DWORD_OP(word, u16, 0x02, 0x0000ffff)
+/* Get a virtual address associated with a BAR region */
+void *pci_map_bar(pci_dev_t pdev, int bar, int flags)
+{
+ pci_addr_t pci_bus_addr;
+ u32 bar_response;
+
+ /* read BAR address */
+ pci_read_config_dword(pdev, bar, &bar_response);
+ pci_bus_addr = (pci_addr_t)(bar_response & ~0xf);
+
+ /*
+ * Pass "0" as the length argument to pci_bus_to_virt. The arg
+ * isn't actualy used on any platform because u-boot assumes a static
+ * linear mapping. In the future, this could read the BAR size
+ * and pass that as the size if needed.
+ */
+ return pci_bus_to_virt(pdev, pci_bus_addr, flags, 0, MAP_NOCACHE);
+}
+
/*
*
*/
-static struct pci_controller* hose_head = NULL;
+static struct pci_controller* hose_head;
void pci_register_hose(struct pci_controller* hose)
{
return NULL;
}
+int pci_last_busno(void)
+{
+ struct pci_controller *hose = hose_head;
+
+ if (!hose)
+ return -1;
+
+ while (hose->next)
+ hose = hose->next;
+
+ return hose->last_busno;
+}
+
#ifndef CONFIG_IXP425
pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
{
for (hose = hose_head; hose; hose = hose->next)
{
-#ifdef CFG_SCSI_SCAN_BUS_REVERSE
+#ifdef CONFIG_SYS_SCSI_SCAN_BUS_REVERSE
for (bus = hose->last_busno; bus >= hose->first_busno; bus--)
#else
for (bus = hose->first_busno; bus <= hose->last_busno; bus++)
*
*/
-unsigned long pci_hose_phys_to_bus (struct pci_controller *hose,
- phys_addr_t phys_addr,
- unsigned long flags)
+int __pci_hose_phys_to_bus (struct pci_controller *hose,
+ phys_addr_t phys_addr,
+ unsigned long flags,
+ unsigned long skip_mask,
+ pci_addr_t *ba)
{
struct pci_region *res;
- unsigned long bus_addr;
+ pci_addr_t bus_addr;
int i;
- if (!hose) {
- printf ("pci_hose_phys_to_bus: %s\n", "invalid hose");
- goto Done;
- }
-
for (i = 0; i < hose->region_count; i++) {
res = &hose->regions[i];
if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0)
continue;
+ if (res->flags & skip_mask)
+ continue;
+
bus_addr = phys_addr - res->phys_start + res->bus_start;
if (bus_addr >= res->bus_start &&
bus_addr < res->bus_start + res->size) {
- return bus_addr;
+ *ba = bus_addr;
+ return 0;
}
}
- printf ("pci_hose_phys_to_bus: %s\n", "invalid physical address");
-
-Done:
- return 0;
+ return 1;
}
-phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose,
- unsigned long bus_addr,
- unsigned long flags)
+pci_addr_t pci_hose_phys_to_bus (struct pci_controller *hose,
+ phys_addr_t phys_addr,
+ unsigned long flags)
{
- struct pci_region *res;
- int i;
+ pci_addr_t bus_addr = 0;
+ int ret;
if (!hose) {
- printf ("pci_hose_bus_to_phys: %s\n", "invalid hose");
- goto Done;
+ puts ("pci_hose_phys_to_bus: invalid hose\n");
+ return bus_addr;
}
+ /* if PCI_REGION_MEM is set we do a two pass search with preference
+ * on matches that don't have PCI_REGION_SYS_MEMORY set */
+ if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) {
+ ret = __pci_hose_phys_to_bus(hose, phys_addr,
+ flags, PCI_REGION_SYS_MEMORY, &bus_addr);
+ if (!ret)
+ return bus_addr;
+ }
+
+ ret = __pci_hose_phys_to_bus(hose, phys_addr, flags, 0, &bus_addr);
+
+ if (ret)
+ puts ("pci_hose_phys_to_bus: invalid physical address\n");
+
+ return bus_addr;
+}
+
+int __pci_hose_bus_to_phys (struct pci_controller *hose,
+ pci_addr_t bus_addr,
+ unsigned long flags,
+ unsigned long skip_mask,
+ phys_addr_t *pa)
+{
+ struct pci_region *res;
+ int i;
+
for (i = 0; i < hose->region_count; i++) {
res = &hose->regions[i];
if (((res->flags ^ flags) & PCI_REGION_TYPE) != 0)
continue;
+ if (res->flags & skip_mask)
+ continue;
+
if (bus_addr >= res->bus_start &&
bus_addr < res->bus_start + res->size) {
- return bus_addr - res->bus_start + res->phys_start;
+ *pa = (bus_addr - res->bus_start + res->phys_start);
+ return 0;
}
}
- printf ("pci_hose_bus_to_phys: %s\n", "invalid physical address");
+ return 1;
+}
-Done:
- return 0;
+phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose,
+ pci_addr_t bus_addr,
+ unsigned long flags)
+{
+ phys_addr_t phys_addr = 0;
+ int ret;
+
+ if (!hose) {
+ puts ("pci_hose_bus_to_phys: invalid hose\n");
+ return phys_addr;
+ }
+
+ /* if PCI_REGION_MEM is set we do a two pass search with preference
+ * on matches that don't have PCI_REGION_SYS_MEMORY set */
+ if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) {
+ ret = __pci_hose_bus_to_phys(hose, bus_addr,
+ flags, PCI_REGION_SYS_MEMORY, &phys_addr);
+ if (!ret)
+ return phys_addr;
+ }
+
+ ret = __pci_hose_bus_to_phys(hose, bus_addr, flags, 0, &phys_addr);
+
+ if (ret)
+ puts ("pci_hose_bus_to_phys: invalid physical address\n");
+
+ return phys_addr;
}
/*
int pci_hose_config_device(struct pci_controller *hose,
pci_dev_t dev,
unsigned long io,
- unsigned long mem,
+ pci_addr_t mem,
unsigned long command)
{
- unsigned int bar_response, bar_size, bar_value, old_command;
+ unsigned int bar_response, old_command;
+ pci_addr_t bar_value;
+ pci_size_t bar_size;
unsigned char pin;
int bar, found_mem64;
- debug ("PCI Config: I/O=0x%lx, Memory=0x%lx, Command=0x%lx\n",
- io, mem, command);
+ debug ("PCI Config: I/O=0x%lx, Memory=0x%llx, Command=0x%lx\n",
+ io, (u64)mem, command);
pci_hose_write_config_dword (hose, dev, PCI_COMMAND, 0);
- for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_5; bar += 4) {
+ for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar += 4) {
pci_hose_write_config_dword (hose, dev, bar, 0xffffffff);
pci_hose_read_config_dword (hose, dev, bar, &bar_response);
io = io + bar_size;
} else {
if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
- PCI_BASE_ADDRESS_MEM_TYPE_64)
- found_mem64 = 1;
+ PCI_BASE_ADDRESS_MEM_TYPE_64) {
+ u32 bar_response_upper;
+ u64 bar64;
+ pci_hose_write_config_dword(hose, dev, bar+4, 0xffffffff);
+ pci_hose_read_config_dword(hose, dev, bar+4, &bar_response_upper);
- bar_size = ~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1;
+ bar64 = ((u64)bar_response_upper << 32) | bar_response;
+
+ bar_size = ~(bar64 & PCI_BASE_ADDRESS_MEM_MASK) + 1;
+ found_mem64 = 1;
+ } else {
+ bar_size = (u32)(~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1);
+ }
/* round up region base address to multiple of size */
mem = ((mem - 1) | (bar_size - 1)) + 1;
}
/* Write it out and update our limit */
- pci_hose_write_config_dword (hose, dev, bar, bar_value);
+ pci_hose_write_config_dword (hose, dev, bar, (u32)bar_value);
if (found_mem64) {
bar += 4;
+#ifdef CONFIG_SYS_PCI_64BIT
+ pci_hose_write_config_dword(hose, dev, bar, (u32)(bar_value>>32));
+#else
pci_hose_write_config_dword (hose, dev, bar, 0x00000000);
+#endif
}
}
extern int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev);
extern void pciauto_config_init(struct pci_controller *hose);
+#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI_SCAN_SHOW)
+const char * pci_class_str(u8 class)
+{
+ switch (class) {
+ case PCI_CLASS_NOT_DEFINED:
+ return "Build before PCI Rev2.0";
+ break;
+ case PCI_BASE_CLASS_STORAGE:
+ return "Mass storage controller";
+ break;
+ case PCI_BASE_CLASS_NETWORK:
+ return "Network controller";
+ break;
+ case PCI_BASE_CLASS_DISPLAY:
+ return "Display controller";
+ break;
+ case PCI_BASE_CLASS_MULTIMEDIA:
+ return "Multimedia device";
+ break;
+ case PCI_BASE_CLASS_MEMORY:
+ return "Memory controller";
+ break;
+ case PCI_BASE_CLASS_BRIDGE:
+ return "Bridge device";
+ break;
+ case PCI_BASE_CLASS_COMMUNICATION:
+ return "Simple comm. controller";
+ break;
+ case PCI_BASE_CLASS_SYSTEM:
+ return "Base system peripheral";
+ break;
+ case PCI_BASE_CLASS_INPUT:
+ return "Input device";
+ break;
+ case PCI_BASE_CLASS_DOCKING:
+ return "Docking station";
+ break;
+ case PCI_BASE_CLASS_PROCESSOR:
+ return "Processor";
+ break;
+ case PCI_BASE_CLASS_SERIAL:
+ return "Serial bus controller";
+ break;
+ case PCI_BASE_CLASS_INTELLIGENT:
+ return "Intelligent controller";
+ break;
+ case PCI_BASE_CLASS_SATELLITE:
+ return "Satellite controller";
+ break;
+ case PCI_BASE_CLASS_CRYPT:
+ return "Cryptographic device";
+ break;
+ case PCI_BASE_CLASS_SIGNAL_PROCESSING:
+ return "DSP";
+ break;
+ case PCI_CLASS_OTHERS:
+ return "Does not fit any class";
+ break;
+ default:
+ return "???";
+ break;
+ };
+}
+#endif /* CONFIG_CMD_PCI || CONFIG_PCI_SCAN_SHOW */
+
+int __pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
+{
+ /*
+ * Check if pci device should be skipped in configuration
+ */
+ if (dev == PCI_BDF(hose->first_busno, 0, 0)) {
+#if defined(CONFIG_PCI_CONFIG_HOST_BRIDGE) /* don't skip host bridge */
+ /*
+ * Only skip configuration if "pciconfighost" is not set
+ */
+ if (getenv("pciconfighost") == NULL)
+ return 1;
+#else
+ return 1;
+#endif
+ }
+
+ return 0;
+}
+int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
+ __attribute__((weak, alias("__pci_skip_dev")));
+
+#ifdef CONFIG_PCI_SCAN_SHOW
+int __pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
+{
+ if (dev == PCI_BDF(hose->first_busno, 0, 0))
+ return 0;
+
+ return 1;
+}
+int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
+ __attribute__((weak, alias("__pci_print_dev")));
+#endif /* CONFIG_PCI_SCAN_SHOW */
+
int pci_hose_scan_bus(struct pci_controller *hose, int bus)
{
unsigned int sub_bus, found_multi=0;
for (dev = PCI_BDF(bus,0,0);
dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1);
- dev += PCI_BDF(0,0,1))
- {
- /* Skip our host bridge */
- if ( dev == PCI_BDF(hose->first_busno,0,0) ) {
-#if defined(CONFIG_PCI_CONFIG_HOST_BRIDGE) /* don't skip host bridge */
- /*
- * Only skip hostbridge configuration if "pciconfighost" is not set
- */
- if (getenv("pciconfighost") == NULL) {
- continue; /* Skip our host bridge */
- }
-#else
- continue; /* Skip our host bridge */
-#endif
- }
+ dev += PCI_BDF(0,0,1)) {
+
+ if (pci_skip_dev(hose, dev))
+ continue;
if (PCI_FUNC(dev) && !found_multi)
continue;
pci_hose_read_config_word(hose, dev, PCI_VENDOR_ID, &vendor);
- if (vendor != 0xffff && vendor != 0x0000) {
-
- if (!PCI_FUNC(dev))
- found_multi = header_type & 0x80;
+ if (vendor == 0xffff || vendor == 0x0000)
+ continue;
- debug ("PCI Scan: Found Bus %d, Device %d, Function %d\n",
- PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev) );
+ if (!PCI_FUNC(dev))
+ found_multi = header_type & 0x80;
- pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device);
- pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
+ debug ("PCI Scan: Found Bus %d, Device %d, Function %d\n",
+ PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev) );
- cfg = pci_find_config(hose, class, vendor, device,
- PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
- if (cfg) {
- cfg->config_device(hose, dev, cfg);
- sub_bus = max(sub_bus, hose->current_busno);
-#ifdef CONFIG_PCI_PNP
- } else {
- int n = pciauto_config_device(hose, dev);
+ pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device);
+ pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
- sub_bus = max(sub_bus, n);
+#ifdef CONFIG_PCI_SCAN_SHOW
+ if (pci_print_dev(hose, dev)) {
+ printf(" %02x:%02x.%x - %04x:%04x - %s\n",
+ PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev),
+ vendor, device, pci_class_str(class >> 8));
+ }
#endif
- }
- if (hose->fixup_irq)
- hose->fixup_irq(hose, dev);
-#ifdef CONFIG_PCI_SCAN_SHOW
- /* Skip our host bridge */
- if ( dev != PCI_BDF(hose->first_busno,0,0) ) {
- unsigned char int_line;
-
- pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_LINE,
- &int_line);
- printf(" %02x %02x %04x %04x %04x %02x\n",
- PCI_BUS(dev), PCI_DEV(dev), vendor, device, class,
- int_line);
- }
+ cfg = pci_find_config(hose, class, vendor, device,
+ PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
+ if (cfg) {
+ cfg->config_device(hose, dev, cfg);
+ sub_bus = max(sub_bus, hose->current_busno);
+#ifdef CONFIG_PCI_PNP
+ } else {
+ int n = pciauto_config_device(hose, dev);
+
+ sub_bus = max(sub_bus, n);
#endif
}
+
+ if (hose->fixup_irq)
+ hose->fixup_irq(hose, dev);
}
return sub_bus;
}
#endif /* CONFIG_PCI_BOOTDELAY */
+ hose_head = NULL;
+
/* now call board specific pci_init()... */
pci_init_board();
}
-
-#endif /* CONFIG_PCI */