]> git.karo-electronics.de Git - karo-tx-uboot.git/blobdiff - drivers/pci/pci_auto.c
usb: ohci: Do not resubmit and leak urbs for interrupt packets
[karo-tx-uboot.git] / drivers / pci / pci_auto.c
index ed928574061600118a7ed8c0e83398c5c070291c..e8da9776731a01f6bb7a20fd6dcc21dfe7cfd176 100644 (file)
@@ -223,9 +223,12 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose,
        struct pci_region *pci_mem = hose->pci_mem;
        struct pci_region *pci_prefetch = hose->pci_prefetch;
        struct pci_region *pci_io = hose->pci_io;
-       u16 cmdstat;
+       u16 cmdstat, prefechable_64;
 
        pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
+       pci_hose_read_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
+                               &prefechable_64);
+       prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
 
        /* Configure bus number registers */
        pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
@@ -252,12 +255,26 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose,
                /* Set up memory and I/O filter limits, assume 32-bit I/O space */
                pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE,
                                        (pci_prefetch->bus_lower & 0xfff00000) >> 16);
+               if (prefechable_64 == PCI_PREF_RANGE_TYPE_64)
+#ifdef CONFIG_SYS_PCI_64BIT
+                       pci_hose_write_config_dword(hose, dev,
+                                       PCI_PREF_BASE_UPPER32,
+                                       pci_prefetch->bus_lower >> 32);
+#else
+                       pci_hose_write_config_dword(hose, dev,
+                                       PCI_PREF_BASE_UPPER32,
+                                       0x0);
+#endif
 
                cmdstat |= PCI_COMMAND_MEMORY;
        } else {
                /* We don't support prefetchable memory for now, so disable */
                pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_BASE, 0x1000);
                pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, 0x0);
+               if (prefechable_64 == PCI_PREF_RANGE_TYPE_64) {
+                       pci_hose_write_config_word(hose, dev, PCI_PREF_BASE_UPPER32, 0x0);
+                       pci_hose_write_config_word(hose, dev, PCI_PREF_LIMIT_UPPER32, 0x0);
+               }
        }
 
        if (pci_io) {
@@ -297,11 +314,28 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose,
        }
 
        if (pci_prefetch) {
+               u16 prefechable_64;
+
+               pci_hose_read_config_word(hose, dev,
+                                       PCI_PREF_MEMORY_LIMIT,
+                                       &prefechable_64);
+               prefechable_64 &= PCI_PREF_RANGE_TYPE_MASK;
+
                /* Round memory allocator to 1MB boundary */
                pciauto_region_align(pci_prefetch, 0x100000);
 
                pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT,
                                (pci_prefetch->bus_lower - 1) >> 16);
+               if (prefechable_64 == PCI_PREF_RANGE_TYPE_64)
+#ifdef CONFIG_SYS_PCI_64BIT
+                       pci_hose_write_config_dword(hose, dev,
+                                       PCI_PREF_LIMIT_UPPER32,
+                                       (pci_prefetch->bus_lower - 1) >> 32);
+#else
+                       pci_hose_write_config_dword(hose, dev,
+                                       PCI_PREF_LIMIT_UPPER32,
+                                       0x0);
+#endif
        }
 
        if (pci_io) {
@@ -398,13 +432,20 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
 
        switch (class) {
        case PCI_CLASS_BRIDGE_PCI:
-               hose->current_busno++;
+               DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n",
+                      PCI_DEV(dev));
+
                pciauto_setup_device(hose, dev, 2, hose->pci_mem,
                        hose->pci_prefetch, hose->pci_io);
 
-               DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev));
-
+#ifdef CONFIG_DM_PCI
+               n = dm_pci_hose_probe_bus(hose, dev);
+               if (n < 0)
+                       return n;
+               sub_bus = (unsigned int)n;
+#else
                /* Passing in current_busno allows for sibling P2P bridges */
+               hose->current_busno++;
                pciauto_prescan_setup_bridge(hose, dev, hose->current_busno);
                /*
                 * need to figure out if this is a subordinate bridge on the bus
@@ -417,6 +458,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
                pciauto_postscan_setup_bridge(hose, dev, sub_bus);
 
                sub_bus = hose->current_busno;
+#endif
                break;
 
        case PCI_CLASS_STORAGE_IDE:
@@ -441,7 +483,9 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
                DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n",
                        PCI_DEV(dev));
 
+#ifndef CONFIG_DM_PCI
                hose->current_busno++;
+#endif
                break;
 
 #if defined(CONFIG_PCIAUTO_SKIP_HOST_BRIDGE)