]> git.karo-electronics.de Git - karo-tx-linux.git/blobdiff - drivers/pwm/pwm-omap-dmtimer.c
Merge tag 'phy-for-4.6-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon...
[karo-tx-linux.git] / drivers / pwm / pwm-omap-dmtimer.c
index 0083e75d950f1e9861541ace58178c1a73e895a7..b7e6ecba7d5c23422323acb4dfa6c6fe432a3a29 100644 (file)
@@ -49,11 +49,7 @@ to_pwm_omap_dmtimer_chip(struct pwm_chip *chip)
 
 static u32 pwm_omap_dmtimer_get_clock_cycles(unsigned long clk_rate, int ns)
 {
-       u64 c = (u64)clk_rate * ns;
-
-       do_div(c, NSEC_PER_SEC);
-
-       return c;
+       return DIV_ROUND_CLOSEST_ULL((u64)clk_rate * ns, NSEC_PER_SEC);
 }
 
 static void pwm_omap_dmtimer_start(struct pwm_omap_dmtimer_chip *omap)
@@ -106,7 +102,8 @@ static int pwm_omap_dmtimer_config(struct pwm_chip *chip,
        unsigned long clk_rate;
        bool timer_active;
 
-       dev_dbg(chip->dev, "duty cycle: %d, period %d\n", duty_ns, period_ns);
+       dev_dbg(chip->dev, "requested duty cycle: %d ns, period: %d ns\n",
+               duty_ns, period_ns);
 
        mutex_lock(&omap->mutex);
        if (duty_ns == pwm_get_duty_cycle(pwm) &&
@@ -119,15 +116,13 @@ static int pwm_omap_dmtimer_config(struct pwm_chip *chip,
        fclk = omap->pdata->get_fclk(omap->dm_timer);
        if (!fclk) {
                dev_err(chip->dev, "invalid pmtimer fclk\n");
-               mutex_unlock(&omap->mutex);
-               return -EINVAL;
+               goto err_einval;
        }
 
        clk_rate = clk_get_rate(fclk);
        if (!clk_rate) {
                dev_err(chip->dev, "invalid pmtimer fclk rate\n");
-               mutex_unlock(&omap->mutex);
-               return -EINVAL;
+               goto err_einval;
        }
 
        dev_dbg(chip->dev, "clk rate: %luHz\n", clk_rate);
@@ -142,6 +137,8 @@ static int pwm_omap_dmtimer_config(struct pwm_chip *chip,
         * The non-active time is the remainder: (DM_TIMER_MAX-match_value)
         * clock cycles.
         *
+        * NOTE: It is required that: load_value <= match_value < DM_TIMER_MAX
+        *
         * References:
         *   OMAP4430/60/70 TRM sections 22.2.4.10 and 22.2.4.11
         *   AM335x Sitara TRM sections 20.1.3.5 and 20.1.3.6
@@ -149,6 +146,33 @@ static int pwm_omap_dmtimer_config(struct pwm_chip *chip,
        period_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, period_ns);
        duty_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, duty_ns);
 
+       if (period_cycles < 2) {
+               dev_info(chip->dev,
+                        "period %d ns too short for clock rate %lu Hz\n",
+                        period_ns, clk_rate);
+               goto err_einval;
+       }
+
+       if (duty_cycles < 1) {
+               dev_dbg(chip->dev,
+                       "duty cycle %d ns is too short for clock rate %lu Hz\n",
+                       duty_ns, clk_rate);
+               dev_dbg(chip->dev, "using minimum of 1 clock cycle\n");
+               duty_cycles = 1;
+       } else if (duty_cycles >= period_cycles) {
+               dev_dbg(chip->dev,
+                       "duty cycle %d ns is too long for period %d ns at clock rate %lu Hz\n",
+                       duty_ns, period_ns, clk_rate);
+               dev_dbg(chip->dev, "using maximum of 1 clock cycle less than period\n");
+               duty_cycles = period_cycles - 1;
+       }
+
+       dev_dbg(chip->dev, "effective duty cycle: %lld ns, period: %lld ns\n",
+               DIV_ROUND_CLOSEST_ULL((u64)NSEC_PER_SEC * duty_cycles,
+                                     clk_rate),
+               DIV_ROUND_CLOSEST_ULL((u64)NSEC_PER_SEC * period_cycles,
+                                     clk_rate));
+
        load_value = (DM_TIMER_MAX - period_cycles) + 1;
        match_value = load_value + duty_cycles - 1;
 
@@ -179,6 +203,11 @@ static int pwm_omap_dmtimer_config(struct pwm_chip *chip,
        mutex_unlock(&omap->mutex);
 
        return 0;
+
+err_einval:
+       mutex_unlock(&omap->mutex);
+
+       return -EINVAL;
 }
 
 static int pwm_omap_dmtimer_set_polarity(struct pwm_chip *chip,