Merge 'u-boot-imx/master' into 'u-boot-arm/master'

[karo-tx-uboot.git] / drivers / serial / serial_sh.h

diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index 96509e127127fb43056f5eae73ddb267dc874fbb..f5e9854d13d23dfce7065f5ed401b06be567c6af 100644 (file)
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -46,7 +46,8 @@ struct uart_port {
        defined(CONFIG_ARCH_SH7367) || \
        defined(CONFIG_ARCH_SH7377) || \
        defined(CONFIG_ARCH_SH7372) || \
-       defined(CONFIG_SH73A0)
+       defined(CONFIG_SH73A0) || \
+       defined(CONFIG_R8A7740)
 # define SCSCR_INIT(port)  0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
 # define PORT_PTCR        0xA405011EUL
 # define PORT_PVCR        0xA4050122UL
@@ -142,7 +143,9 @@ struct uart_port {
 #elif defined(CONFIG_H8S2678)
 # define SCSCR_INIT(port)          0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
 # define H8300_SCI_DR(ch) (*(volatile char *)(P1DR + h8300_sci_pins[ch].port))
-#elif defined(CONFIG_CPU_SH7757)
+#elif defined(CONFIG_CPU_SH7757) || \
+       defined(CONFIG_CPU_SH7752) || \
+       defined(CONFIG_CPU_SH7753)
 # define SCSPTR0 0xfe4b0020
 # define SCSPTR1 0xfe4b0020
 # define SCSPTR2 0xfe4b0020
@@ -223,6 +226,9 @@ struct uart_port {
 # define SCSPTR3 0xffc60020            /* 16 bit SCIF */
 # define SCIF_ORER 0x0001              /* Overrun error bit */
 # define SCSCR_INIT(port)      0x38    /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+# define SCIF_ORER     0x0001
+# define SCSCR_INIT(port)      0x32    /* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */
 #else
 # error CPU subtype not defined
 #endif
@@ -284,7 +290,8 @@ struct uart_port {
        defined(CONFIG_ARCH_SH7367) || \
        defined(CONFIG_ARCH_SH7377) || \
        defined(CONFIG_ARCH_SH7372) || \
-       defined(CONFIG_SH73A0)
+       defined(CONFIG_SH73A0) || \
+       defined(CONFIG_R8A7740)
 # define SCIF_ORER    0x0200
 # define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER)
 # define SCIF_RFDC_MASK 0x007f
@@ -296,6 +303,9 @@ struct uart_port {
 /* SH7763 SCIF2 support */
 # define SCIF2_RFDC_MASK 0x001f
 # define SCIF2_TXROOM_MAX 16
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+# define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
+# define SCIF_RFDC_MASK        0x003f
 #else
 # define SCIF_ERRORS (SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK)
 # define SCIF_RFDC_MASK 0x001f
@@ -329,7 +339,8 @@ struct uart_port {
        defined(CONFIG_ARCH_SH7367) || \
        defined(CONFIG_ARCH_SH7377) || \
        defined(CONFIG_ARCH_SH7372) || \
-       defined(CONFIG_SH73A0)
+       defined(CONFIG_SH73A0) || \
+       defined(CONFIG_R8A7740)
 # define SCxSR_RDxF_CLEAR(port)         (sci_in(port, SCxSR) & 0xfffc)
 # define SCxSR_ERROR_CLEAR(port) (sci_in(port, SCxSR) & 0xfd73)
 # define SCxSR_TDxE_CLEAR(port)         (sci_in(port, SCxSR) & 0xffdf)
@@ -424,7 +435,8 @@ static inline void sci_##name##_out(struct uart_port *port,\
        defined(CONFIG_ARCH_SH7367) || \
        defined(CONFIG_ARCH_SH7377) || \
        defined(CONFIG_ARCH_SH7372) || \
-       defined(CONFIG_SH73A0)
+       defined(CONFIG_SH73A0) || \
+       defined(CONFIG_R8A7740)
 #if defined(CONFIG_CPU_SH7710) || defined(CONFIG_CPU_SH7712)
 #define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size,\
                                sh4_sci_offset, sh4_sci_size, \
@@ -444,7 +456,8 @@ static inline void sci_##name##_out(struct uart_port *port,\
        defined(CONFIG_SH73A0)
 #define SCIF_FNS(name, scif_offset, scif_size) \
        CPU_SCIF_FNS(name, scif_offset, scif_size)
-#elif defined(CONFIG_ARCH_SH7372)
+#elif defined(CONFIG_ARCH_SH7372) || \
+       defined(CONFIG_R8A7740)
 #define SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size,\
                                sh4_scifb_offset, sh4_scifb_size) \
        CPU_SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size,\
@@ -511,7 +524,8 @@ SCIF_FNS(SCFDR,  0x1c, 16)
 SCIF_FNS(SCxTDR, 0x20,  8)
 SCIF_FNS(SCxRDR, 0x24,  8)
 SCIF_FNS(SCLSR,  0x00,  0)
-#elif defined(CONFIG_ARCH_SH7372)
+#elif defined(CONFIG_ARCH_SH7372) || \
+       defined(CONFIG_R8A7740)
 SCIF_FNS(SCSMR,  0x00, 16)
 SCIF_FNS(SCBRR,  0x04,  8)
 SCIF_FNS(SCSCR,  0x08, 16)
@@ -573,6 +587,10 @@ SCIF_FNS(SCSPTR,                        0,  0, 0, 0)
 #else
 SCIF_FNS(SCSPTR,                        0,  0, 0x20, 16)
 #endif
+#if defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+SCIF_FNS(DL,                           0,  0, 0x30, 16)
+SCIF_FNS(CKS,                          0,  0, 0x34, 16)
+#endif
 SCIF_FNS(SCLSR,                         0,  0, 0x24, 16)
 #endif
 #endif
@@ -699,7 +717,8 @@ static inline int sci_rxd_in(struct uart_port *port)
        defined(CONFIG_ARCH_SH7367) || \
        defined(CONFIG_ARCH_SH7377) || \
        defined(CONFIG_ARCH_SH7372) || \
-       defined(CONFIG_SH73A0)
+       defined(CONFIG_SH73A0) || \
+       defined(CONFIG_R8A7740)
 #define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
 #elif defined(CONFIG_CPU_SH7723) ||\
        defined(CONFIG_CPU_SH7724)
@@ -713,6 +732,9 @@ static inline int scbrr_calc(struct uart_port port, int bps, int clk)
 #define SCBRR_VALUE(bps, clk) scbrr_calc(sh_sci, bps, clk)
 #elif defined(__H8300H__) || defined(__H8300S__)
 #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1)
+#elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791)
+#define SCBRR DL
+#define SCBRR_VALUE(bps, clk) (clk / bps / 16)
 #else /* Generic SH */
 #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
 #endif