------------------------------------------------------------
*/
+#ifdef CONFIG_SMC_USE_IOFUNCS
+/*
+ * input and output functions
+ *
+ * Implemented due to inx,outx macros accessing the device improperly
+ * and putting the device into an unkown state.
+ *
+ * For instance, on Sharp LPD7A400 SDK, affects were chip memory
+ * could not be free'd (hence the alloc failures), duplicate packets,
+ * packets being corrupt (shifted) on the wire, etc. Switching to the
+ * inx,outx functions fixed this problem.
+ */
+static inline word SMC_inw(dword offset);
+static inline void SMC_outw(word value, dword offset);
+static inline byte SMC_inb(dword offset);
+static inline void SMC_outb(byte value, dword offset);
+static inline void SMC_insw(dword offset, volatile uchar* buf, dword len);
+static inline void SMC_outsw(dword offset, uchar* buf, dword len);
+
+#define barrier() __asm__ __volatile__("": : :"memory")
+
+static inline word SMC_inw(dword offset)
+{
+ word v;
+ v = *((volatile word*)(SMC_BASE_ADDRESS+offset));
+ barrier(); *(volatile u32*)(0xc0000000);
+ return v;
+}
+
+static inline void SMC_outw(word value, dword offset)
+{
+ *((volatile word*)(SMC_BASE_ADDRESS+offset)) = value;
+ barrier(); *(volatile u32*)(0xc0000000);
+}
+
+static inline byte SMC_inb(dword offset)
+{
+ word _w;
+
+ _w = SMC_inw(offset & ~((dword)1));
+ return (offset & 1) ? (byte)(_w >> 8) : (byte)(_w);
+}
+
+static inline void SMC_outb(byte value, dword offset)
+{
+ word _w;
+
+ _w = SMC_inw(offset & ~((dword)1));
+ if (offset & 1)
+ *((volatile word*)(SMC_BASE_ADDRESS+(offset & ~((dword)1)))) = (value<<8) | (_w & 0x00ff);
+ else
+ *((volatile word*)(SMC_BASE_ADDRESS+offset)) = value | (_w & 0xff00);
+}
+
+static inline void SMC_insw(dword offset, volatile uchar* buf, dword len)
+{
+ while (len-- > 0) {
+ *((word*)buf)++ = SMC_inw(offset);
+ barrier(); *((volatile u32*)(0xc0000000));
+ }
+}
+
+static inline void SMC_outsw(dword offset, uchar* buf, dword len)
+{
+ while (len-- > 0) {
+ SMC_outw(*((word*)buf)++, offset);
+ barrier(); *(volatile u32*)(0xc0000000);
+ }
+}
+#endif /* CONFIG_SMC_USE_IOFUNCS */
+
static char unsigned smc_mac_addr[6] = {0x02, 0x80, 0xad, 0x20, 0x31, 0xb8};
/*
}
/* we have a packet address, so tell the card to use it */
+#ifndef CONFIG_XAENIAX
SMC_outb (packet_no, PN_REG);
-
+#else
+ /* On Xaeniax board, we can't use SMC_outb here because that way
+ * the Allocate MMU command will end up written to the command register
+ * as well, which will lead to a problem.
+ */
+ SMC_outl (packet_no << 16, 0);
+#endif
/* do not write new ptr value if Write data fifo not empty */
while ( saved_ptr & PTR_NOTEMPTY )
printf ("Write data fifo not empty!\n");
*/
#ifdef USE_32_BIT
SMC_outsl (SMC91111_DATA_REG, buf, length >> 2);
+#ifndef CONFIG_XAENIAX
if (length & 0x2)
SMC_outw (*((word *) (buf + (length & 0xFFFFFFFC))),
SMC91111_DATA_REG);
+#else
+ /* On XANEIAX, we can only use 32-bit writes, so we need to handle
+ * unaligned tail part specially. The standard code doesn't work.
+ */
+ if ((length & 3) == 3) {
+ u16 * ptr = (u16*) &buf[length-3];
+ SMC_outl((*ptr) | ((0x2000 | buf[length-1]) << 16),
+ SMC91111_DATA_REG);
+ } else if ((length & 2) == 2) {
+ u16 * ptr = (u16*) &buf[length-2];
+ SMC_outl(*ptr, SMC91111_DATA_REG);
+ } else if (length & 1) {
+ SMC_outl((0x2000 | buf[length-1]), SMC91111_DATA_REG);
+ } else {
+ SMC_outl(0, SMC91111_DATA_REG);
+ }
+#endif
#else
SMC_outsw (SMC91111_DATA_REG, buf, (length) >> 1);
#endif /* USE_32_BIT */
+#ifndef CONFIG_XAENIAX
/* Send the last byte, if there is one. */
if ((length & 1) == 0) {
SMC_outw (0, SMC91111_DATA_REG);
} else {
SMC_outw (buf[length - 1] | 0x2000, SMC91111_DATA_REG);
}
+#endif
/* and let the chipset deal with it */
SMC_outw (MC_ENQUEUE, MMU_CMD_REG);
/* release packet */
/* no need to release, MMU does that now */
- /* SMC_outw (MC_FREEPKT, MMU_CMD_REG); */
+#ifdef CONFIG_XAENIAX
+ SMC_outw (MC_FREEPKT, MMU_CMD_REG);
+#endif
/* wait for MMU getting ready (low) */
while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
/* release packet */
/* no need to release, MMU does that now */
- /* SMC_outw (MC_FREEPKT, MMU_CMD_REG); */
+#ifdef CONFIG_XAENIAX
+ SMC_outw (MC_FREEPKT, MMU_CMD_REG);
+#endif
/* wait for MMU getting ready (low) */
while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
}
/* restore previously saved registers */
+#ifndef CONFIG_XAENIAX
SMC_outb( saved_pnr, PN_REG );
+#else
+ /* On Xaeniax board, we can't use SMC_outb here because that way
+ * the Allocate MMU command will end up written to the command register
+ * as well, which will lead to a problem.
+ */
+ SMC_outl(saved_pnr << 16, 0);
+#endif
SMC_outw( saved_ptr, PTR_REG );
return length;
address = smc_mac_addr[i + 1] << 8;
address |= smc_mac_addr[i];
- SMC_outw (address, ADDR0_REG + i);
+ SMC_outw (address, (ADDR0_REG + i));
}
#else
for (i = 0; i < 6; i++)
- SMC_outb (smc_mac_addr[i], ADDR0_REG + i);
+ SMC_outb (smc_mac_addr[i], (ADDR0_REG + i));
#endif
return 0;
udelay(1); /* Wait until not busy */
/* restore saved registers */
+#ifndef CONFIG_XAENIAX
SMC_outb( saved_pnr, PN_REG );
+#else
+ /* On Xaeniax board, we can't use SMC_outb here because that way
+ * the Allocate MMU command will end up written to the command register
+ * as well, which will lead to a problem.
+ */
+ SMC_outl( saved_pnr << 16, 0);
+#endif
SMC_outw( saved_ptr, PTR_REG );
if (!is_error) {
/* Re-Configure the Receive/Phy Control register */
SMC_outw (RPC_DEFAULT, RPC_REG);
- smc_phy_configure_exit:
+smc_phy_configure_exit: ;
}
#endif /* !CONFIG_SMC91111_EXT_PHY */
SMC_SELECT_BANK (1);
for (i=0; i<6; i++)
{
- v_rom_mac[i] = SMC_inb (ADDR0_REG + i);
+ v_rom_mac[i] = SMC_inb ((ADDR0_REG + i));
valid_mac |= v_rom_mac[i];
}
projects / karo-tx-uboot.git / blobdiff