[POWERPC] PS3: Update ps3_defconfig

[mv-sheeva.git] / drivers / spi / Kconfig

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 8ce16a0b8a5065cddac8d3fdc1dc0a5725981d3f..abf05048c638ee224db9b5fcf7f708a6aeccf5f5 100644 (file)
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -61,7 +61,7 @@ config SPI_ATMEL
 
 config SPI_BFIN
        tristate "SPI controller driver for ADI Blackfin5xx"
-       depends on SPI_MASTER && BFIN
+       depends on SPI_MASTER && BLACKFIN
        help
          This is the SPI controller master driver for Blackfin 5xx processor.
 
@@ -124,16 +124,17 @@ config SPI_MPC52xx_PSC
          Controller in master SPI mode.
 
 config SPI_MPC83xx
-       tristate "Freescale MPC83xx SPI controller"
-       depends on SPI_MASTER && PPC_83xx && EXPERIMENTAL
+       tristate "Freescale MPC83xx/QUICC Engine SPI controller"
+       depends on SPI_MASTER && (PPC_83xx || QUICC_ENGINE) && EXPERIMENTAL
        select SPI_BITBANG
        help
-         This enables using the Freescale MPC83xx SPI controller in master
-         mode.
+         This enables using the Freescale MPC83xx and QUICC Engine SPI
+         controllers in master mode.
 
          Note, this driver uniquely supports the SPI controller on the MPC83xx
-         family of PowerPC processors.  The MPC83xx uses a simple set of shift
-         registers for data (opposed to the CPM based descriptor model).
+         family of PowerPC processors, plus processors with QUICC Engine
+         technology. This driver uses a simple set of shift registers for data
+         (opposed to the CPM based descriptor model).
 
 config SPI_OMAP_UWIRE
        tristate "OMAP1 MicroWire"
@@ -142,6 +143,12 @@ config SPI_OMAP_UWIRE
        help
          This hooks up to the MicroWire controller on OMAP1 chips.
 
+config SPI_OMAP24XX
+       tristate "McSPI driver for OMAP24xx"
+       depends on SPI_MASTER && ARCH_OMAP24XX
+       help
+         SPI master controller for OMAP24xx Multichannel SPI
+         (McSPI) modules.
 
 config SPI_PXA2XX
        tristate "PXA2xx SSP SPI master"
@@ -167,6 +174,23 @@ config SPI_S3C24XX_GPIO
          GPIO lines to provide the SPI bus. This can be used where
          the inbuilt hardware cannot provide the transfer mode, or
          where the board is using non hardware connected pins.
+
+config SPI_TXX9
+       tristate "Toshiba TXx9 SPI controller"
+       depends on SPI_MASTER && GENERIC_GPIO && CPU_TX49XX
+       help
+         SPI driver for Toshiba TXx9 MIPS SoCs
+
+config SPI_XILINX
+       tristate "Xilinx SPI controller"
+       depends on SPI_MASTER && XILINX_VIRTEX && EXPERIMENTAL
+       select SPI_BITBANG
+       help
+         This exposes the SPI controller IP from the Xilinx EDK.
+
+         See the "OPB Serial Peripheral Interface (SPI) (v1.00e)"
+         Product Specification document (DS464) for hardware details.
+
 #
 # Add new SPI master controllers in alphabetical order above this line
 #
@@ -198,6 +222,15 @@ config SPI_SPIDEV
          Note that this application programming interface is EXPERIMENTAL
          and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes.
 
+config SPI_TLE62X0
+       tristate "Infineon TLE62X0 (for power switching)"
+       depends on SPI_MASTER && SYSFS
+       help
+         SPI driver for Infineon TLE62X0 series line driver chips,
+         such as the TLE6220, TLE6230 and TLE6240.  This provides a
+         sysfs interface, with each line presented as a kind of GPIO
+         exposing both switch control and diagnostic feedback.
+
 #
 # Add new SPI protocol masters in alphabetical order above this line
 #