Merge tag 'v4.6-rc1'

[karo-tx-linux.git] / drivers / staging / clocking-wizard / clk-xlnx-clock-wizard.c

diff --git a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c b/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c
index b8e2f611fd47b027fb0486a02306515e9ec7798a..7b8be5293883b2d5f5ba96ff4bc9e860d37d3a63 100644 (file)
--- a/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c
+++ b/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c
@@ -32,8 +32,8 @@
 
 #define WZRD_CLK_CFG_REG(n)    (0x200 + 4 * (n))
 
-#define WZRD_CLkOUT0_FRAC_EN   BIT(18)
-#define WZRD_CLkFBOUT_FRAC_EN  BIT(26)
+#define WZRD_CLKOUT0_FRAC_EN   BIT(18)
+#define WZRD_CLKFBOUT_FRAC_EN  BIT(26)
 
 #define WZRD_CLKFBOUT_MULT_SHIFT       8
 #define WZRD_CLKFBOUT_MULT_MASK                (0xff << WZRD_CLKFBOUT_MULT_SHIFT)
@@ -71,6 +71,7 @@ struct clk_wzrd {
        int speed_grade;
        bool suspended;
 };
+
 #define to_clk_wzrd(_nb) container_of(_nb, struct clk_wzrd, nb)
 
 /* maximum frequencies for input/output clocks per speed grade */
@@ -195,9 +196,9 @@ static int clk_wzrd_probe(struct platform_device *pdev)
 
        /* we don't support fractional div/mul yet */
        reg = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(0)) &
-                   WZRD_CLkFBOUT_FRAC_EN;
+                   WZRD_CLKFBOUT_FRAC_EN;
        reg |= readl(clk_wzrd->base + WZRD_CLK_CFG_REG(2)) &
-                    WZRD_CLkOUT0_FRAC_EN;
+                    WZRD_CLKOUT0_FRAC_EN;
        if (reg)
                dev_warn(&pdev->dev, "fractional div/mul not supported\n");