// The address is stored in EthernetIDAddr.
//=============================================================================================================
void
-Uxx_ReadEthernetAddress( phw_data_t pHwData )
+Uxx_ReadEthernetAddress( struct hw_data * pHwData )
{
u32 ltmp;
*Value = (u8) ((u8)1 << (BitNumber % 8));
}
-void Uxx_power_on_procedure( phw_data_t pHwData )
+void Uxx_power_on_procedure( struct hw_data * pHwData )
{
u32 ltmp, loop;
Wb35Reg_WriteSync( pHwData, 0x03f8, 0x7ff );
}
-void Set_ChanIndep_RfData_al7230_24( phw_data_t pHwData, u32 *pltmp ,char number)
+void Set_ChanIndep_RfData_al7230_24( struct hw_data * pHwData, u32 *pltmp ,char number)
{
u8 i;
}
}
-void Set_ChanIndep_RfData_al7230_50( phw_data_t pHwData, u32 *pltmp, char number)
+void Set_ChanIndep_RfData_al7230_50( struct hw_data * pHwData, u32 *pltmp, char number)
{
u8 i;
// RFSynthesizer_initial --
//=============================================================================================================
void
-RFSynthesizer_initial(phw_data_t pHwData)
+RFSynthesizer_initial(struct hw_data * pHwData)
{
u32 altmp[32];
u32 * pltmp = altmp;
}
}
-void BBProcessor_AL7230_2400( phw_data_t pHwData)
+void BBProcessor_AL7230_2400( struct hw_data * pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
u32 pltmp[12];
}
-void BBProcessor_AL7230_5000( phw_data_t pHwData)
+void BBProcessor_AL7230_5000( struct hw_data * pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
u32 pltmp[12];
// None.
//=============================================================================================================
void
-BBProcessor_initial( phw_data_t pHwData )
+BBProcessor_initial( struct hw_data * pHwData )
{
struct wb35_reg *reg = &pHwData->reg;
u32 i, pltmp[12];
reg->SQ3_filter[i] = 0x2f; // half of Bit 0 ~ 6
}
-void set_tx_power_per_channel_max2829( phw_data_t pHwData, ChanInfo Channel)
+void set_tx_power_per_channel_max2829( struct hw_data * pHwData, ChanInfo Channel)
{
RFSynthesizer_SetPowerIndex( pHwData, 100 ); // 20060620.1 Modify
}
-void set_tx_power_per_channel_al2230( phw_data_t pHwData, ChanInfo Channel )
+void set_tx_power_per_channel_al2230( struct hw_data * pHwData, ChanInfo Channel )
{
u8 index = 100;
RFSynthesizer_SetPowerIndex( pHwData, index );
}
-void set_tx_power_per_channel_al7230( phw_data_t pHwData, ChanInfo Channel)
+void set_tx_power_per_channel_al7230( struct hw_data * pHwData, ChanInfo Channel)
{
u8 i, index = 100;
RFSynthesizer_SetPowerIndex( pHwData, index );
}
-void set_tx_power_per_channel_wb242( phw_data_t pHwData, ChanInfo Channel)
+void set_tx_power_per_channel_wb242( struct hw_data * pHwData, ChanInfo Channel)
{
u8 index = 100;
// None.
//=============================================================================================================
void
-RFSynthesizer_SwitchingChannel( phw_data_t pHwData, ChanInfo Channel )
+RFSynthesizer_SwitchingChannel( struct hw_data * pHwData, ChanInfo Channel )
{
struct wb35_reg *reg = &pHwData->reg;
u32 pltmp[16]; // The 16 is the maximum capability of hardware
}
//Set the tx power directly from DUT GUI, not from the EEPROM. Return the current setting
-u8 RFSynthesizer_SetPowerIndex( phw_data_t pHwData, u8 PowerIndex )
+u8 RFSynthesizer_SetPowerIndex( struct hw_data * pHwData, u8 PowerIndex )
{
u32 Band = pHwData->band;
u8 index=0;
}
//-- Sub function
-u8 RFSynthesizer_SetMaxim2828_24Power( phw_data_t pHwData, u8 index )
+u8 RFSynthesizer_SetMaxim2828_24Power( struct hw_data * pHwData, u8 index )
{
u32 PowerData;
if( index > 1 ) index = 1;
return index;
}
//--
-u8 RFSynthesizer_SetMaxim2828_50Power( phw_data_t pHwData, u8 index )
+u8 RFSynthesizer_SetMaxim2828_50Power( struct hw_data * pHwData, u8 index )
{
u32 PowerData;
if( index > 1 ) index = 1;
return index;
}
//--
-u8 RFSynthesizer_SetMaxim2827_24Power( phw_data_t pHwData, u8 index )
+u8 RFSynthesizer_SetMaxim2827_24Power( struct hw_data * pHwData, u8 index )
{
u32 PowerData;
if( index > 1 ) index = 1;
return index;
}
//--
-u8 RFSynthesizer_SetMaxim2827_50Power( phw_data_t pHwData, u8 index )
+u8 RFSynthesizer_SetMaxim2827_50Power( struct hw_data * pHwData, u8 index )
{
u32 PowerData;
if( index > 1 ) index = 1;
return index;
}
//--
-u8 RFSynthesizer_SetMaxim2825Power( phw_data_t pHwData, u8 index )
+u8 RFSynthesizer_SetMaxim2825Power( struct hw_data * pHwData, u8 index )
{
u32 PowerData;
if( index > 1 ) index = 1;
return index;
}
//--
-u8 RFSynthesizer_SetAiroha2230Power( phw_data_t pHwData, u8 index )
+u8 RFSynthesizer_SetAiroha2230Power( struct hw_data * pHwData, u8 index )
{
u32 PowerData;
u8 i,count;
return i;
}
//--
-u8 RFSynthesizer_SetAiroha7230Power( phw_data_t pHwData, u8 index )
+u8 RFSynthesizer_SetAiroha7230Power( struct hw_data * pHwData, u8 index )
{
u32 PowerData;
u8 i,count;
return i;
}
-u8 RFSynthesizer_SetWinbond242Power( phw_data_t pHwData, u8 index )
+u8 RFSynthesizer_SetWinbond242Power( struct hw_data * pHwData, u8 index )
{
u32 PowerData;
u8 i,count;
// Initial the hardware setting and module variable
//
//===========================================================================================================
-void Dxx_initial( phw_data_t pHwData )
+void Dxx_initial( struct hw_data * pHwData )
{
struct wb35_reg *reg = &pHwData->reg;
Wb35Reg_WriteSync( pHwData, 0x0400, reg->D00_DmaControl );
}
-void Mxx_initial( phw_data_t pHwData )
+void Mxx_initial( struct hw_data * pHwData )
{
struct wb35_reg *reg = &pHwData->reg;
u32 tmp;
}
-void Uxx_power_off_procedure( phw_data_t pHwData )
+void Uxx_power_off_procedure( struct hw_data * pHwData )
{
// SW, PMU reset and turn off clock
Wb35Reg_WriteSync( pHwData, 0x03b0, 3 );
}
//Decide the TxVga of every channel
-void GetTxVgaFromEEPROM( phw_data_t pHwData )
+void GetTxVgaFromEEPROM( struct hw_data * pHwData )
{
u32 i, j, ltmp;
u16 Value[MAX_TXVGA_EEPROM];
// or RFSynthesizer_SetPowerIndex be called, new TxVga will take effect.
// TxVgaSettingInEEPROM of sHwData is an u8 array point to EEPROM contain for IS89C35
// This function will use default TxVgaSettingInEEPROM data to calculate new TxVga.
-void EEPROMTxVgaAdjust( phw_data_t pHwData ) // 20060619.5 Add
+void EEPROMTxVgaAdjust( struct hw_data * pHwData ) // 20060619.5 Add
{
u8 * pTxVga = pHwData->TxVgaSettingInEEPROM;
s16 i, stmp;
#endif
}
-void BBProcessor_RateChanging( phw_data_t pHwData, u8 rate ) // 20060613.1
+void BBProcessor_RateChanging( struct hw_data * pHwData, u8 rate ) // 20060613.1
{
struct wb35_reg *reg = &pHwData->reg;
unsigned char Is11bRate;
projects / mv-sheeva.git / blobdiff