Merge remote-tracking branch 'clk/clk-next'

[karo-tx-linux.git] / drivers / tty / serial / 8250 / 8250_dw.c

diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index 7ed0580d2794acdfc0e7049308bf905fc6b564c9..a5d319e4aae65dad90f64bafd33c2ad02bed7034 100644 (file)
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -227,10 +227,6 @@ static void dw8250_set_termios(struct uart_port *p, struct ktermios *termios,
        if (IS_ERR(d->clk) || !old)
                goto out;
 
-       /* Not requesting clock rates below 1.8432Mhz */
-       if (baud < 115200)
-               baud = 115200;
-
        clk_disable_unprepare(d->clk);
        rate = clk_round_rate(d->clk, baud * 16);
        ret = clk_set_rate(d->clk, rate);
@@ -247,51 +243,22 @@ out:
        serial8250_do_set_termios(p, termios, old);
 }
 
-static bool dw8250_dma_filter(struct dma_chan *chan, void *param)
+/*
+ * dw8250_fallback_dma_filter will prevent the UART from getting just any free
+ * channel on platforms that have DMA engines, but don't have any channels
+ * assigned to the UART.
+ *
+ * REVISIT: This is a work around for limitation in the DMA Engine API. Once the
+ * core problem is fixed, this function is no longer needed.
+ */
+static bool dw8250_fallback_dma_filter(struct dma_chan *chan, void *param)
 {
        return false;
 }
 
-static void dw8250_setup_port(struct uart_8250_port *up)
-{
-       struct uart_port        *p = &up->port;
-       u32                     reg = readl(p->membase + DW_UART_UCV);
-
-       /*
-        * If the Component Version Register returns zero, we know that
-        * ADDITIONAL_FEATURES are not enabled. No need to go any further.
-        */
-       if (!reg)
-               return;
-
-       dev_dbg_ratelimited(p->dev, "Designware UART version %c.%c%c\n",
-               (reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff);
-
-       reg = readl(p->membase + DW_UART_CPR);
-       if (!reg)
-               return;
-
-       /* Select the type based on fifo */
-       if (reg & DW_UART_CPR_FIFO_MODE) {
-               p->type = PORT_16550A;
-               p->flags |= UPF_FIXED_TYPE;
-               p->fifosize = DW_UART_CPR_FIFO_SIZE(reg);
-               up->tx_loadsz = p->fifosize;
-               up->capabilities = UART_CAP_FIFO;
-       }
-
-       if (reg & DW_UART_CPR_AFCE_MODE)
-               up->capabilities |= UART_CAP_AFE;
-}
-
 static bool dw8250_idma_filter(struct dma_chan *chan, void *param)
 {
-       struct device *dev = param;
-
-       if (dev != chan->device->dev->parent)
-               return false;
-
-       return true;
+       return param == chan->device->dev->parent;
 }
 
 static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data)
@@ -333,6 +300,38 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data)
        }
 }
 
+static void dw8250_setup_port(struct uart_port *p)
+{
+       struct uart_8250_port *up = up_to_u8250p(p);
+       u32 reg;
+
+       /*
+        * If the Component Version Register returns zero, we know that
+        * ADDITIONAL_FEATURES are not enabled. No need to go any further.
+        */
+       reg = readl(p->membase + DW_UART_UCV);
+       if (!reg)
+               return;
+
+       dev_dbg(p->dev, "Designware UART version %c.%c%c\n",
+               (reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff);
+
+       reg = readl(p->membase + DW_UART_CPR);
+       if (!reg)
+               return;
+
+       /* Select the type based on fifo */
+       if (reg & DW_UART_CPR_FIFO_MODE) {
+               p->type = PORT_16550A;
+               p->flags |= UPF_FIXED_TYPE;
+               p->fifosize = DW_UART_CPR_FIFO_SIZE(reg);
+               up->capabilities = UART_CAP_FIFO;
+       }
+
+       if (reg & DW_UART_CPR_AFCE_MODE)
+               up->capabilities |= UART_CAP_AFE;
+}
+
 static int dw8250_probe(struct platform_device *pdev)
 {
        struct uart_8250_port uart = {};
@@ -360,7 +359,7 @@ static int dw8250_probe(struct platform_device *pdev)
        p->handle_irq   = dw8250_handle_irq;
        p->pm           = dw8250_do_pm;
        p->type         = PORT_8250;
-       p->flags        = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
+       p->flags        = UPF_SHARE_IRQ | UPF_FIXED_PORT;
        p->dev          = &pdev->dev;
        p->iotype       = UPIO_MEM;
        p->serial_in    = dw8250_serial_in;
@@ -374,6 +373,7 @@ static int dw8250_probe(struct platform_device *pdev)
        if (!data)
                return -ENOMEM;
 
+       data->dma.fn = dw8250_fallback_dma_filter;
        data->usr_reg = DW_UART_USR;
        p->private_data = data;
 
@@ -460,10 +460,6 @@ static int dw8250_probe(struct platform_device *pdev)
        if (!IS_ERR(data->rst))
                reset_control_deassert(data->rst);
 
-       data->dma.rx_param = data;
-       data->dma.tx_param = data;
-       data->dma.fn = dw8250_dma_filter;
-
        dw8250_quirks(p, data);
 
        /* If the Busy Functionality is not implemented, don't handle it */
@@ -473,7 +469,7 @@ static int dw8250_probe(struct platform_device *pdev)
        }
 
        if (!data->skip_autocfg)
-               dw8250_setup_port(&uart);
+               dw8250_setup_port(p);
 
        /* If we have a valid fifosize, try hooking up DMA */
        if (p->fifosize) {