return DIV_ROUND_CLOSEST(freq, s->sampling_rate * bps) - 1;
}
-/* calculate frame length from SMR */
-static int sci_baud_calc_frame_len(unsigned int smr_val)
-{
- int len = 10;
-
- if (smr_val & SCSMR_CHR)
- len--;
- if (smr_val & SCSMR_PE)
- len++;
- if (smr_val & SCSMR_STOP)
- len++;
-
- return len;
-}
-
-
/* calculate sample rate, BRR, and clock select for HSCIF */
-static void sci_baud_calc_hscif(unsigned int bps, unsigned long freq,
- int *brr, unsigned int *srr,
- unsigned int *cks, int frame_len)
+static void sci_baud_calc_hscif(unsigned int bps, unsigned long freq, int *brr,
+ unsigned int *srr, unsigned int *cks)
{
int sr, c, br, err, recv_margin;
int min_err = 1000; /* 100% */
baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
if (likely(baud && port->uartclk)) {
if (s->cfg->type == PORT_HSCIF) {
- int frame_len = sci_baud_calc_frame_len(smr_val);
sci_baud_calc_hscif(baud, port->uartclk, &t, &srr,
- &cks, frame_len);
+ &cks);
} else {
t = sci_scbrr_calc(s, baud, port->uartclk);
for (cks = 0; t >= 256 && cks <= 3; cks++)
static int sci_init_clocks(struct sci_port *sci_port, struct device *dev)
{
/* Get the SCI functional clock. It's called "fck" on ARM. */
- sci_port->fclk = clk_get(dev, "fck");
+ sci_port->fclk = devm_clk_get(dev, "fck");
if (PTR_ERR(sci_port->fclk) == -EPROBE_DEFER)
return -EPROBE_DEFER;
if (!IS_ERR(sci_port->fclk))
* But it used to be called "sci_ick", and we need to maintain DT
* backward compatibility.
*/
- sci_port->fclk = clk_get(dev, "sci_ick");
+ sci_port->fclk = devm_clk_get(dev, "sci_ick");
if (PTR_ERR(sci_port->fclk) == -EPROBE_DEFER)
return -EPROBE_DEFER;
if (!IS_ERR(sci_port->fclk))
return 0;
/* SH has historically named the clock "sci_fck". */
- sci_port->fclk = clk_get(dev, "sci_fck");
+ sci_port->fclk = devm_clk_get(dev, "sci_fck");
if (!IS_ERR(sci_port->fclk))
return 0;
* Not all SH platforms declare a clock lookup entry for SCI devices,
* in which case we need to get the global "peripheral_clk" clock.
*/
- sci_port->fclk = clk_get(dev, "peripheral_clk");
+ sci_port->fclk = devm_clk_get(dev, "peripheral_clk");
if (!IS_ERR(sci_port->fclk))
return 0;
static void sci_cleanup_single(struct sci_port *port)
{
- clk_put(port->fclk);
-
pm_runtime_disable(port->port.dev);
}
{
struct sci_port *sci_port = &sci_ports[co->index];
struct uart_port *port = &sci_port->port;
- unsigned short bits, ctrl;
+ unsigned short bits, ctrl, ctrl_temp;
unsigned long flags;
int locked = 1;
else
spin_lock(&port->lock);
- /* first save the SCSCR then disable the interrupts */
+ /* first save SCSCR then disable interrupts, keep clock source */
ctrl = serial_port_in(port, SCSCR);
- serial_port_out(port, SCSCR, sci_port->cfg->scscr);
+ ctrl_temp = (sci_port->cfg->scscr & ~(SCSCR_CKE1 | SCSCR_CKE0)) |
+ (ctrl & (SCSCR_CKE1 | SCSCR_CKE0));
+ serial_port_out(port, SCSCR, ctrl_temp);
uart_console_write(port, s, count, serial_console_putchar);