#define VOVRCLK __REG_2700G(0x00000044)
#define PIXCLK __REG_2700G(0x00000048)
#define MEMCLK __REG_2700G(0x0000004c)
-#define M24CLK __REG_2700G(0x00000054)
+#define M24CLK __REG_2700G(0x00000050)
#define MBXCLK __REG_2700G(0x00000054)
#define SDCLK __REG_2700G(0x00000058)
#define PIXCLKDIV __REG_2700G(0x0000005c)
#define HSCOEFF0 __REG_2700G(0x000021b4)
#define HSCOEFF1 __REG_2700G(0x000021b8)
#define HSCOEFF2 __REG_2700G(0x000021bc)
-#define HSCOEFF3 __REG_2700G(0x000021b0)
+#define HSCOEFF3 __REG_2700G(0x000021c0)
#define HSCOEFF4 __REG_2700G(0x000021c4)
#define HSCOEFF5 __REG_2700G(0x000021c8)
#define HSCOEFF6 __REG_2700G(0x000021cc)