OMAP: DSS2: DSI: Fix DSI PLL power bug

[mv-sheeva.git] / drivers / video / omap2 / dss / dsi.c

diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index cd872e9d798981e5e6e2032194a978a990f84e0c..cbd9ca48d6ecef175e1c5204956ba3fbb7915974 100644 (file)
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -409,6 +409,9 @@ static void dsi_perf_show(const char *name)
 
 static void print_irq_status(u32 status)
 {
+       if (status == 0)
+               return;
+
 #ifndef VERBOSE_IRQ
        if ((status & ~DSI_IRQ_CHANNEL_MASK) == 0)
                return;
@@ -444,6 +447,9 @@ static void print_irq_status(u32 status)
 
 static void print_irq_status_vc(int channel, u32 status)
 {
+       if (status == 0)
+               return;
+
 #ifndef VERBOSE_IRQ
        if ((status & ~DSI_VC_IRQ_PACKET_SENT) == 0)
                return;
@@ -470,6 +476,9 @@ static void print_irq_status_vc(int channel, u32 status)
 
 static void print_irq_status_cio(u32 status)
 {
+       if (status == 0)
+               return;
+
        printk(KERN_DEBUG "DSI CIO IRQ 0x%x: ", status);
 
 #define PIS(x) \
@@ -1050,6 +1059,11 @@ static int dsi_pll_power(enum dsi_pll_power_state state)
 {
        int t = 0;
 
+       /* DSI-PLL power command 0x3 is not working */
+       if (dss_has_feature(FEAT_DSI_PLL_PWR_BUG) &&
+                       state == DSI_PLL_POWER_ON_DIV)
+               state = DSI_PLL_POWER_ON_ALL;
+
        REG_FLD_MOD(DSI_CLK_CTRL, state, 31, 30);       /* PLL_PWR_CMD */
 
        /* PLL_PWR_STATUS */
@@ -1267,6 +1281,9 @@ int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo)
 
        DSSDBGF();
 
+       dsi.current_cinfo.use_sys_clk = cinfo->use_sys_clk;
+       dsi.current_cinfo.highfreq = cinfo->highfreq;
+
        dsi.current_cinfo.fint = cinfo->fint;
        dsi.current_cinfo.clkin4ddr = cinfo->clkin4ddr;
        dsi.current_cinfo.dsi_pll_hsdiv_dispc_clk =
@@ -1479,7 +1496,6 @@ void dsi_pll_uninit(void)
 
 void dsi_dump_clocks(struct seq_file *s)
 {
-       int clksel;
        struct dsi_clock_info *cinfo = &dsi.current_cinfo;
        enum dss_clk_source dispc_clk_src, dsi_clk_src;
 
@@ -1488,13 +1504,10 @@ void dsi_dump_clocks(struct seq_file *s)
 
        enable_clocks(1);
 
-       clksel = REG_GET(DSI_PLL_CONFIGURATION2, 11, 11);
-
        seq_printf(s,   "- DSI PLL -\n");
 
        seq_printf(s,   "dsi pll source = %s\n",
-                       clksel == 0 ?
-                       "dss_sys_clk" : "pclkfree");
+                       cinfo->use_sys_clk ? "dss_sys_clk" : "pclkfree");
 
        seq_printf(s,   "Fint\t\t%-16luregn %u\n", cinfo->fint, cinfo->regn);
 
@@ -2242,24 +2255,31 @@ int dsi_vc_send_bta_sync(int channel)
        if (r)
                goto err0;
 
-       r = dsi_vc_send_bta(channel);
+       r = dsi_register_isr(dsi_completion_handler, &completion,
+                       DSI_IRQ_ERROR_MASK);
        if (r)
                goto err1;
 
+       r = dsi_vc_send_bta(channel);
+       if (r)
+               goto err2;
+
        if (wait_for_completion_timeout(&completion,
                                msecs_to_jiffies(500)) == 0) {
                DSSERR("Failed to receive BTA\n");
                r = -EIO;
-               goto err1;
+               goto err2;
        }
 
        err = dsi_get_errors();
        if (err) {
                DSSERR("Error while sending BTA: %x\n", err);
                r = -EIO;
-               goto err1;
+               goto err2;
        }
-
+err2:
+       dsi_unregister_isr(dsi_completion_handler, &completion,
+                       DSI_IRQ_ERROR_MASK);
 err1:
        dsi_unregister_isr_vc(channel, dsi_completion_handler,
                        &completion, DSI_VC_IRQ_BTA);