[ARM] 4185/2: entry: introduce get_irqnr_preamble and arch_ret_to_user

[mv-sheeva.git] / include / asm-arm / arch-iop32x / entry-macro.S

diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S
index 52d9435c6a349efada18ada71dd5b1272a2e0b57..207db99dfbd2130f655235cc86d447817dd2216a 100644 (file)
--- a/include/asm-arm/arch-iop32x/entry-macro.S
+++ b/include/asm-arm/arch-iop32x/entry-macro.S
@@ -3,26 +3,34 @@
  *
  * Low-level IRQ helper macros for IOP32x-based platforms
  *
- * This file is licensed under  the terms of the GNU General Public
+ * This file is licensed under the terms of the GNU General Public
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-#include <asm/arch/irqs.h>
+#include <asm/arch/iop32x.h>
 
-               .macro  disable_fiq
-               .endm
+       .macro  disable_fiq
+       .endm
 
-               /*
-                * Note: only deal with normal interrupts, not FIQ
-                */
-               .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-               mov     \irqnr, #0
-               mrc     p6, 0, \irqstat, c8, c0, 0      @ Read IINTSRC
-               cmp     \irqstat, #0
-               beq     1001f
-               clz     \irqnr, \irqstat
-               mov     \base, #31
-               subs    \irqnr,\base,\irqnr
-               add     \irqnr,\irqnr,#IRQ_IOP321_DMA0_EOT
-1001:
-               .endm
+       .macro get_irqnr_preamble, base, tmp
+       mrc     p15, 0, \tmp, c15, c1, 0
+       orr     \tmp, \tmp, #(1 << 6)
+       mcr     p15, 0, \tmp, c15, c1, 0        @ Enable cp6 access
+       mrc     p15, 0, \tmp, c15, c1, 0
+       mov     \tmp, \tmp
+       sub     pc, pc, #4                      @ cp_wait
+       .endm
+
+       .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+       mrc     p6, 0, \irqstat, c8, c0, 0      @ Read IINTSRC
+       cmp     \irqstat, #0
+       clzne   \irqnr, \irqstat
+       rsbne   \irqnr, \irqnr, #31
+       .endm
+
+       .macro arch_ret_to_user, tmp1, tmp2
+       mrc     p15, 0, \tmp1, c15, c1, 0
+       ands    \tmp2, \tmp1, #(1 << 6)
+       bicne   \tmp1, \tmp1, #(1 << 6)
+       mcrne   p15, 0, \tmp1, c15, c1, 0       @ Disable cp6 access
+       .endm