#include <asm/io.h>
#include <asm/page.h>
#include <asm/oplib.h>
+#include <asm/prom.h>
#include <asm/iommu.h>
/* The abstraction used here is that there are PCI controllers,
/* Opaque 32-bit system bus Port ID. */
u32 portid;
+ /* Opaque 32-bit handle used for hypervisor calls. */
+ u32 devhandle;
+
/* Chipset version information. */
int chip_type;
#define PBM_CHIP_TYPE_SABRE 1
int chip_revision;
/* Name used for top-level resources. */
- char name[64];
+ char *name;
/* OBP specific information. */
- int prom_node;
- char prom_name[64];
- struct linux_prom_pci_ranges pbm_ranges[PROM_PCIRNG_MAX];
+ struct device_node *prom_node;
+ struct linux_prom_pci_ranges *pbm_ranges;
int num_pbm_ranges;
- struct linux_prom_pci_intmap pbm_intmap[PROM_PCIIMAP_MAX];
+ struct linux_prom_pci_intmap *pbm_intmap;
int num_pbm_intmap;
- struct linux_prom_pci_intmask pbm_intmask;
+ struct linux_prom_pci_intmask *pbm_intmask;
u64 ino_bitmap;
/* PBM I/O and Memory space resources. */
*/
struct pcidev_cookie {
struct pci_pbm_info *pbm;
- char prom_name[64];
- int prom_node;
+ struct device_node *prom_node;
struct linux_prom_pci_registers prom_regs[PROMREG_MAX];
int num_prom_regs;
struct linux_prom_pci_registers prom_assignments[PROMREG_MAX];