extern int apic_runs_main_timer;
extern int ioapic_force;
+extern int disable_apic;
extern int disable_apic_timer;
-extern unsigned boot_cpu_id;
/*
* Basic functions accessing APICs.
#define setup_secondary_clock setup_secondary_APIC_clock
#endif
-static inline fastcall void native_apic_write(unsigned long reg, u32 v)
+extern int is_vsmp_box(void);
+
+static inline void native_apic_write(unsigned long reg, u32 v)
{
*((volatile u32 *)(APIC_BASE + reg)) = v;
}
-static inline fastcall void native_apic_write_atomic(unsigned long reg, u32 v)
+static inline void native_apic_write_atomic(unsigned long reg, u32 v)
{
- (void) xchg((u32*)(APIC_BASE + reg), v);
+ (void)xchg((u32 *)(APIC_BASE + reg), v);
}
-static inline fastcall u32 native_apic_read(unsigned long reg)
+static inline u32 native_apic_read(unsigned long reg)
{
return *((volatile u32 *)(APIC_BASE + reg));
}
extern void sync_Arb_IDs(void);
extern void init_bsp_APIC(void);
extern void setup_local_APIC(void);
+extern void end_local_APIC_setup(void);
extern void init_apic_mappings(void);
extern void setup_boot_APIC_clock(void);
extern void setup_secondary_APIC_clock(void);
extern int APIC_init_uniprocessor(void);
-extern void enable_NMI_through_LVT0(void *dummy);
+extern void enable_NMI_through_LVT0(void);
/*
* On 32bit this is mach-xxx local
*/
#ifdef CONFIG_X86_64
-extern void setup_apic_routing(void);
+extern void early_init_lapic_mapping(void);
#endif
-extern void setup_APIC_extended_lvt(unsigned char lvt_off, unsigned char vector,
- unsigned char msg_type, unsigned char mask);
+extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask);
+extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
extern int apic_is_clustered_box(void);