x86: don't set IO APIC features if IO APIC is not enabled

[mv-sheeva.git] / include / asm-x86 / processor.h

diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index d590da88c0dfb7fd44cba63cd66c584ce8f5bc83..6e26c7c717a23a15255869f2b864350faf21d597 100644 (file)
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -3,8 +3,7 @@
 
 #include <asm/processor-flags.h>
 
-/* migration helpers, for KVM - will be removed in 2.6.25: */
-#include <asm/vm86.h>
+/* migration helper, for KVM - will be removed in 2.6.25: */
 #define Xgt_desc_struct        desc_ptr
 
 /* Forward declaration, a strange C thing */
@@ -176,12 +175,12 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
                                unsigned int *ecx, unsigned int *edx)
 {
        /* ecx is often an input as well as an output. */
-       __asm__("cpuid"
-               : "=a" (*eax),
-                 "=b" (*ebx),
-                 "=c" (*ecx),
-                 "=d" (*edx)
-               : "0" (*eax), "2" (*ecx));
+       asm("cpuid"
+           : "=a" (*eax),
+             "=b" (*ebx),
+             "=c" (*ecx),
+             "=d" (*edx)
+           : "0" (*eax), "2" (*ecx));
 }
 
 static inline void load_cr3(pgd_t *pgdir)
@@ -428,17 +427,23 @@ static inline unsigned long native_get_debugreg(int regno)
 
        switch (regno) {
        case 0:
-               asm("mov %%db0, %0" :"=r" (val)); break;
+               asm("mov %%db0, %0" :"=r" (val));
+               break;
        case 1:
-               asm("mov %%db1, %0" :"=r" (val)); break;
+               asm("mov %%db1, %0" :"=r" (val));
+               break;
        case 2:
-               asm("mov %%db2, %0" :"=r" (val)); break;
+               asm("mov %%db2, %0" :"=r" (val));
+               break;
        case 3:
-               asm("mov %%db3, %0" :"=r" (val)); break;
+               asm("mov %%db3, %0" :"=r" (val));
+               break;
        case 6:
-               asm("mov %%db6, %0" :"=r" (val)); break;
+               asm("mov %%db6, %0" :"=r" (val));
+               break;
        case 7:
-               asm("mov %%db7, %0" :"=r" (val)); break;
+               asm("mov %%db7, %0" :"=r" (val));
+               break;
        default:
                BUG();
        }
@@ -479,14 +484,14 @@ static inline void native_set_iopl_mask(unsigned mask)
 #ifdef CONFIG_X86_32
        unsigned int reg;
 
-       __asm__ __volatile__ ("pushfl;"
-                             "popl %0;"
-                             "andl %1, %0;"
-                             "orl %2, %0;"
-                             "pushl %0;"
-                             "popfl"
-                               : "=&r" (reg)
-                               : "i" (~X86_EFLAGS_IOPL), "r" (mask));
+       asm volatile ("pushfl;"
+                     "popl %0;"
+                     "andl %1, %0;"
+                     "orl %2, %0;"
+                     "pushl %0;"
+                     "popfl"
+                     : "=&r" (reg)
+                     : "i" (~X86_EFLAGS_IOPL), "r" (mask));
 #endif
 }
 
@@ -524,8 +529,8 @@ static inline void native_swapgs(void)
 #define set_debugreg(value, register)                          \
        native_set_debugreg(register, value)
 
-static inline void
-load_sp0(struct tss_struct *tss, struct thread_struct *thread)
+static inline void load_sp0(struct tss_struct *tss,
+                           struct thread_struct *thread)
 {
        native_load_sp0(tss, thread);
 }
@@ -681,7 +686,7 @@ static inline unsigned int cpuid_edx(unsigned int op)
 /* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
 static inline void rep_nop(void)
 {
-       __asm__ __volatile__("rep; nop" ::: "memory");
+       asm volatile("rep; nop" ::: "memory");
 }
 
 static inline void cpu_relax(void)
@@ -695,32 +700,29 @@ static inline void sync_core(void)
        int tmp;
 
        asm volatile("cpuid" : "=a" (tmp) : "0" (1)
-                                         : "ebx", "ecx", "edx", "memory");
+                    : "ebx", "ecx", "edx", "memory");
 }
 
-static inline void
-__monitor(const void *eax, unsigned long ecx, unsigned long edx)
+static inline void __monitor(const void *eax, unsigned long ecx,
+                            unsigned long edx)
 {
        /* "monitor %eax, %ecx, %edx;" */
-       asm volatile(
-               ".byte 0x0f, 0x01, 0xc8;"
-               :: "a" (eax), "c" (ecx), "d"(edx));
+       asm volatile(".byte 0x0f, 0x01, 0xc8;"
+                    :: "a" (eax), "c" (ecx), "d"(edx));
 }
 
 static inline void __mwait(unsigned long eax, unsigned long ecx)
 {
        /* "mwait %eax, %ecx;" */
-       asm volatile(
-               ".byte 0x0f, 0x01, 0xc9;"
-               :: "a" (eax), "c" (ecx));
+       asm volatile(".byte 0x0f, 0x01, 0xc9;"
+                    :: "a" (eax), "c" (ecx));
 }
 
 static inline void __sti_mwait(unsigned long eax, unsigned long ecx)
 {
        /* "mwait %eax, %ecx;" */
-       asm volatile(
-               "sti; .byte 0x0f, 0x01, 0xc9;"
-               :: "a" (eax), "c" (ecx));
+       asm volatile("sti; .byte 0x0f, 0x01, 0xc9;"
+                    :: "a" (eax), "c" (ecx));
 }
 
 extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);
@@ -742,6 +744,15 @@ extern void switch_to_new_gdt(void);
 extern void cpu_init(void);
 extern void init_gdt(int cpu);
 
+static inline void update_debugctlmsr(unsigned long debugctlmsr)
+{
+#ifndef CONFIG_X86_DEBUGCTLMSR
+       if (boot_cpu_data.x86 < 6)
+               return;
+#endif
+       wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
+}
+
 /*
  * from system description table in BIOS. Mostly for MCA use, but
  * others may find it useful:
@@ -862,7 +873,7 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk);
 /*
  * User space process size. 47bits minus one guard page.
  */
-#define TASK_SIZE64            (0x800000000000UL - 4096)
+#define TASK_SIZE64    ((1UL << 47) - PAGE_SIZE)
 
 /* This decides where the kernel will search for a free chunk of vm
  * space during mmap's.