* (C) Copyright 2001
* Erik Theisen, Wave 7 Optics, etheisen@mindspring.com
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
/*
#define CONFIG_W7O 1 /* ...on a Wave 7 Optics board */
#define CONFIG_W7OLMG 1 /* ...specifically an LMG */
+#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
+
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_F 1 /* and misc_init_f() */
+#define CONFIG_MISC_INIT_R 1 /* and misc_init_r() */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
#define CONFIG_PPC4xx_EMAC
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
-#define CONFIG_NET_MULTI
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */
#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
#define CONFIG_SYS_PROMPT "Wave7Optics> " /* Monitor Command Prompt */
#undef CONFIG_SYS_HUSH_PARSER /* No hush parse for U-Boot */
#ifdef CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#endif
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CONFIG_CONS_INDEX 1 /* Use UART0 */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE 1
+#define CONFIG_SYS_NS16550_CLK get_serial_clock()
+
#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
#define CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
#define CONFIG_SYS_BASE_BAUD 384000
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
#define CONFIG_SYS_EXTBDINFO 1 /* use extended board_info (bd_t) */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------
#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
#define CONFIG_PCI /* include pci support */
+#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
#define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */
#define CONFIG_PCI_PNP /* pci plug-and-play */
/* resource configuration */
#define CONFIG_SYS_EBC_PB5CR 0xFD87A000
/* bank 6 is unused */
-/* pb6ap = 0 */
+/* PB6AP = 0 */
#define CONFIG_SYS_EBC_PB6AP 0x00000000
-/* pb6cr = 0 */
+/* PB6CR = 0 */
#define CONFIG_SYS_EBC_PB6CR 0x00000000
/* bank 7 is LED register */
/*-----------------------------------------------------------------------
* I2C EEPROM (ATMEL 24C04N)
*/
-#define CONFIG_HARD_I2C 1 /* Hardware assisted I2C */
-#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CONFIG_SYS_I2C_SLAVE 0x7F
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_PPC4XX
+#define CONFIG_SYS_I2C_PPC4XX_CH0
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
+#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM ATMEL 24C04N */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
* Definitions for initial stack pointer and data area (in RAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM */
-#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM */
-#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*