Fix merge problems

[karo-tx-uboot.git] / include / configs / csb637.h

diff --git a/include/configs/csb637.h b/include/configs/csb637.h
index 071d5b7f36c5646581660f89c1225a30ff2c8fc0..735a211e07e84c04d603809ef3d469d7b8825f7d 100644 (file)
--- a/include/configs/csb637.h
+++ b/include/configs/csb637.h
@@ -51,7 +51,7 @@
 #define MC_ASR_VAL     0x00000000
 #define MC_AASR_VAL    0x00000000
 #define EBI_CFGR_VAL   0x00000000
-#define SMC2_CSR_VAL   0x00003284 /* 16bit, 2 TDF, 4 WS */
+#define SMC_CSR0_VAL   0x00003284 /* 16bit, 2 TDF, 4 WS */
 
 /* clocks */
 #define PLLAR_VAL      0x2031BE01 /* 184.320000 MHz for PCK */
@@ -99,20 +99,26 @@
 #define CONFIG_BOOTDELAY      3
 /* #define CONFIG_ENV_OVERWRITE        1 */
 
-#define CONFIG_COMMANDS                \
-                      ((CONFIG_CMD_DFL | \
-                       CFG_CMD_JFFS2 | \
-                       CFG_CMD_DHCP | \
-                       CFG_CMD_PING ) & \
-                     ~(CFG_CMD_BDI | \
-                       CFG_CMD_IMI | \
-                       CFG_CMD_AUTOSCRIPT | \
-                       CFG_CMD_FPGA | \
-                       CFG_CMD_MISC | \
-                       CFG_CMD_LOADS ))
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_PING
+
+#ifdef NAND_SUPPORT_HAS_BEEN_FIXED     /* NAND support is broken / unimplemented */
 
 #define CFG_MAX_NAND_DEVICE    1       /* Max number of NAND devices           */
 #define SECTORSIZE 512
@@ -128,6 +134,7 @@
 #define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
 #define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
 
+#include <asm/arch/AT91RM9200.h>       /* needed for port definitions */
 #define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
 #define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
 
@@ -143,6 +150,8 @@
 #define NAND_CTL_CLRCLE(nandptr)
 #define NAND_CTL_SETCLE(nandptr)
 
+#endif /* NAND_SUPPORT_HAS_BEEN_FIXED */
+
 #define CONFIG_NR_DRAM_BANKS 1
 #define PHYS_SDRAM                     0x20000000
 #define PHYS_SDRAM_SIZE                        0x4000000  /* 64 megs */
@@ -158,8 +167,8 @@
 
 #undef CONFIG_HAS_DATAFLASH
 #define CFG_SPI_WRITE_TOUT             (5*CFG_HZ)
-#define CFG_MAX_DATAFLASH_BANKS        0
-#define CFG_MAX_DATAFLASH_PAGES        16384
+#define CFG_MAX_DATAFLASH_BANKS                0
+#define CFG_MAX_DATAFLASH_PAGES                16384
 #define CFG_DATAFLASH_LOGIC_ADDR_CS0   0xC0000000      /* Logical adress for CS0 */
 #define CFG_DATAFLASH_LOGIC_ADDR_CS3   0xD0000000      /* Logical adress for CS3 */
 
@@ -197,35 +206,16 @@
 
 #define CFG_LOAD_ADDR          0x21000000  /* default load address */
 
-#define CFG_BAUDRATE_TABLE     {115200, 57600, 38400, 19200, 9600 }
+#define CFG_BAUDRATE_TABLE     { 115200, 57600, 38400, 19200, 9600 }
 
 #define CFG_PROMPT             "U-Boot> "      /* Monitor Command Prompt */
 #define CFG_CBSIZE             256             /* Console I/O Buffer Size */
 #define CFG_MAXARGS            16              /* max number of command args */
 #define CFG_PBSIZE             (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 
-#ifndef __ASSEMBLY__
-/*-----------------------------------------------------------------------
- * Board specific extension for bd_info
- *
- * This structure is embedded in the global bd_info (bd_t) structure
- * and can be used by the board specific code (eg board/...)
- */
-
-struct bd_info_ext {
-       /* helper variable for board environment handling
-        *
-        * env_crc_valid == 0    =>   uninitialised
-        * env_crc_valid  > 0    =>   environment crc in flash is valid
-        * env_crc_valid  < 0    =>   environment crc in flash is invalid
-        */
-       int env_crc_valid;
-};
-#endif
-
 #define CFG_HZ 1000
 #define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2      /* AT91C_TC0_CMR is implicitly set to */
-                                       /* AT91C_TC_TIMER_DIV1_CLOCK */
+                                               /* AT91C_TC_TIMER_DIV1_CLOCK */
 
 #define CONFIG_STACKSIZE       (32*1024)       /* regular stack */