* (C) Copyright 2009
* Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
*/
#define CONFIG_MPC5200
-#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
-#define CONFIG_MPX5200 1 /* ... on MPX5200 board */
-#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */
+#define CONFIG_MPX5200 1 /* MPX5200 board */
+#define CONFIG_MPC5200_DDR 1 /* use DDR RAM */
#define CONFIG_IPEK01 /* Motherboard is ipek01 */
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_TEXT_BASE 0xfc000000
#define CONFIG_MISC_INIT_R
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM 0x02 /* Software reboot */
-
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x01000000
-#define CONFIG_NET_MULTI 1
#define CONFIG_MII 1
#define CONFIG_EEPRO100 1
#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
/*
* Command line configuration.
*/
-#include <config_cmd_default.h>
-
#ifdef CONFIG_VIDEO
#define CONFIG_CMD_BMP /* BMP support */
#endif
/* Use SRAM until RAM will be available */
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
/* End of used area in DPRAM */
-#define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
-
-/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_SIZE 128
+#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \
- CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
#ifdef CONFIG_CMD_KGDB
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
#define CONFIG_LOOPW
/*