]> git.karo-electronics.de Git - karo-tx-uboot.git/blobdiff - include/configs/sbc8349.h
83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xx
[karo-tx-uboot.git] / include / configs / sbc8349.h
index f476e3ed5e690eae28d56de937f415d3689877fa..7e31de688629d96e148356f4fa1f5194efbdd696 100644 (file)
@@ -35,7 +35,7 @@
  * High Level Configuration Options
  */
 #define CONFIG_E300            1       /* E300 Family */
-#define CONFIG_MPC83XX         1       /* MPC83XX family */
+#define CONFIG_MPC83xx         1       /* MPC83xx family */
 #define CONFIG_MPC834X         1       /* MPC834X family */
 #define CONFIG_MPC8349         1       /* MPC8349 specific */
 #define CONFIG_SBC8349         1       /* WRS SBC8349 board specific */
 #define CONFIG_SYS_LBC_LSRT    0x32000000    /* LB sdram refresh timer, about 6us */
 #define CONFIG_SYS_LBC_MRTPR   0x20000000    /* LB refresh timer prescal, 266MHz/32 */
 
-/*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_RFEN      (1 << (31 -  1))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1516  (3 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1617  (4 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_RFCR5     (3 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_RFCR8     (5 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_RFCR16    (7 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT3 (3 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT6 (5 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW3  (3 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW7  (7 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW6  (6 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_BL8       (1 << (31 - 23))
-#define CONFIG_SYS_LBC_LSDMR_WRC2      (2 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_WRC3      (3 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_WRC4      (0 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_BUFCMD    (1 << (31 - 29))
-#define CONFIG_SYS_LBC_LSDMR_CL3       (3 << (31 - 31))
-
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
-#define CONFIG_SYS_LBC_LSDMR_COMMON    ( CONFIG_SYS_LBC_LSDMR_RFEN            \
-                               | CONFIG_SYS_LBC_LSDMR_BSMA1516 \
-                               | CONFIG_SYS_LBC_LSDMR_RFCR8            \
-                               | CONFIG_SYS_LBC_LSDMR_PRETOACT6        \
-                               | CONFIG_SYS_LBC_LSDMR_ACTTORW3 \
-                               | CONFIG_SYS_LBC_LSDMR_BL8              \
-                               | CONFIG_SYS_LBC_LSDMR_WRC3             \
-                               | CONFIG_SYS_LBC_LSDMR_CL3              \
+#define CONFIG_SYS_LBC_LSDMR_COMMON    ( LSDMR_RFEN            \
+                               | LSDMR_BSMA1516        \
+                               | LSDMR_RFCR8           \
+                               | LSDMR_PRETOACT6       \
+                               | LSDMR_ACTTORW3        \
+                               | LSDMR_BL8             \
+                               | LSDMR_WRC3            \
+                               | LSDMR_CL3             \
                                )
 
 /*
  * SDRAM Controller configuration sequence.
  */
-#define CONFIG_SYS_LBC_LSDMR_1         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
-#define CONFIG_SYS_LBC_LSDMR_2         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_3         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_4         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_MRW)
-#define CONFIG_SYS_LBC_LSDMR_5         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
+#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
+#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
+#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
 #endif
 
 /*
 #define CONFIG_HARD_I2C                        /* I2C with hardware support*/
 #undef CONFIG_SOFT_I2C                 /* I2C bit-banged */
 #define CONFIG_FSL_I2C
-#define CONFIG_I2C_CMD_TREE
 #define CONFIG_SYS_I2C_SPEED           400000  /* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE           0x7F
 #define CONFIG_SYS_I2C_NOPROBES        {0x69}  /* Don't probe these addrs */
 #endif
 
 /* System IO Config */
-#define CONFIG_SYS_SICRH SICRH_TSOBI1
+#define CONFIG_SYS_SICRH 0
 #define CONFIG_SYS_SICRL SICRL_LDP_A
 
 #define CONFIG_SYS_HID0_INIT   0x000000000
 #define CONFIG_SYS_IBAT5U      (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP)
 
 /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L      (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CONFIG_SYS_IBAT6L      (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE | \
+                                BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT6U      (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
 
 #define CONFIG_SYS_IBAT7L      (0)