rename CFG_ENV macros to CONFIG_ENV

[karo-tx-uboot.git] / include / configs / scb9328.h

diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h
index 489c35ff4b4c410379f88ce1a7acc2ec2e9066a8..12799559fb8cd25b32a61a05c0685dbe2c961c7b 100644 (file)
--- a/include/configs/scb9328.h
+++ b/include/configs/scb9328.h
@@ -35,6 +35,15 @@
  */
 
 
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
 /*
  * Command line configuration.
  */
@@ -96,7 +105,7 @@
 /*
  * Malloc pool need to host env + 128 Kb reserve for other allocations.
  */
-#define CFG_MALLOC_LEN         (CFG_ENV_SIZE + (128<<10) )
+#define CFG_MALLOC_LEN         (CONFIG_ENV_SIZE + (128<<10) )
 
 
 #define CFG_GBL_DATA_SIZE      128     /* size in bytes reserved for initial data */
@@ -180,7 +189,7 @@
  * Right now there is no gain for user, but later on booting kernel might be
  * possible. Consider using XIP kernel running from flash to save RAM
  * footprint.
- * NOTE: Enable CFG_CMD_JFFS2 for JFFS2 support.
+ * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
  */
 #define CFG_JFFS2_FIRST_BANK           0
 #define CFG_JFFS2_FIRST_SECTOR         5
@@ -206,9 +215,9 @@
 
 #define CFG_MONITOR_BASE       0x10000000
 #define CFG_MONITOR_LEN                0x20000         /* 128b ( 1 flash sector )  */
-#define CFG_ENV_IS_IN_FLASH    1
-#define CFG_ENV_ADDR           0x10020000      /* absolute address for now  */
-#define CFG_ENV_SIZE           0x20000
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_ADDR                0x10020000      /* absolute address for now  */
+#define CONFIG_ENV_SIZE                0x20000
 
 #define         CONFIG_ENV_OVERWRITE  1                /* env is not writable now   */
 
@@ -247,14 +256,10 @@
 #define CFG_CS5U_VAL 0x00008400
 #define CFG_CS5L_VAL 0x00000D03
 
-#define CONFIG_DRIVER_DM9000           1
 #define CONFIG_DRIVER_DM9000           1
 #define CONFIG_DM9000_BASE             0x16000000
 #define DM9000_IO                      CONFIG_DM9000_BASE
 #define DM9000_DATA                    (CONFIG_DM9000_BASE+4)
-/* #define CONFIG_DM9000_USE_8BIT */
-#define CONFIG_DM9000_USE_16BIT
-/* #define CONFIG_DM9000_USE_32BIT */
 
 /* f_{dpll}=2*f{ref}*(MFI+MFN/(MFD+1))/(PD+1)
    f_ref=16,777MHz